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authorAndre Przywara <andre.przywara@arm.com>2022-10-05 17:38:49 +0100
committerTom Rini <trini@konsulko.com>2022-11-02 13:31:40 -0400
commit2e32930087caa802c9d026befb83f977460b627c (patch)
treea85f9470d457ca8a6d7f522da942bb903df866fb /arch
parentd660a82934fdb8ab23a789d1e53ac34825e9f7c7 (diff)
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arm: smh: Allow semihosting trap calls to be inlined
Currently our semihosting trap function is somewhat fragile: we rely on the current compiler behaviour to assign the second inline assembly argument to the next free register (r1/x1), which happens to be the "addr" argument to the smh_trap() function (per the calling convention). I guess this is also the reason for the noinline attribute. Make it explicit what we want: the "addr" argument needs to go into r1, so we add another register variable. This allows to drop the "noinline" attribute, so now the compiler beautifully inlines just the trap instruction directly into the calling function. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/lib/semihosting.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 3dee7d51b3..939c0f7513 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -39,9 +39,10 @@
/*
* Call the handler
*/
-static noinline long smh_trap(unsigned int sysnum, void *addr)
+static long smh_trap(unsigned int sysnum, void *addr)
{
register long result asm("r0");
+ register void *_addr asm("r1") = addr;
/*
* We need a memory clobber (aka compiler barrier) for two reasons:
@@ -53,7 +54,7 @@ static noinline long smh_trap(unsigned int sysnum, void *addr)
*/
asm volatile (SMH_TRAP
: "=r" (result)
- : "0"(sysnum), "r"(USE_PTR(addr))
+ : "0"(sysnum), "r"(USE_PTR(_addr))
: "memory");
return result;