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authorBin Meng <bmeng.cn@gmail.com>2016-05-25 19:19:09 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-05-30 10:21:12 +0800
commitec3791322159accacb06213a660a63b9ffb84f31 (patch)
tree28a0d181fa2ecf8f9bd7d6f6006a1474140c07bb /arch/x86
parent6683584c08cd58ed88a6b60d613bca9086bf8fab (diff)
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x86: quark: Prepare device.h for inclusion by ASL
There is a device.h for quark on-chip devices, mainly for definitions of internal PCI device numbers, but it's not ready to be included by ASL files. Update to use hex numbers for PCI dev and __ASSEMBLY__. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/include/asm/arch-quark/device.h21
1 files changed, 15 insertions, 6 deletions
diff --git a/arch/x86/include/asm/arch-quark/device.h b/arch/x86/include/asm/arch-quark/device.h
index 7882f339f0..4760aa2f7f 100644
--- a/arch/x86/include/asm/arch-quark/device.h
+++ b/arch/x86/include/asm/arch-quark/device.h
@@ -7,12 +7,17 @@
#ifndef _QUARK_DEVICE_H_
#define _QUARK_DEVICE_H_
-#include <pci.h>
+/*
+ * Internal PCI device numbers within the SoC.
+ *
+ * Note it must start with 0x_ prefix, as the device number macro will be
+ * included in the ACPI ASL files (see irq_helper.h and irq_route.h).
+ */
-#define QUARK_HOST_BRIDGE_DEV 0
+#define QUARK_HOST_BRIDGE_DEV 0x00
#define QUARK_HOST_BRIDGE_FUNC 0
-#define QUARK_DEV_20 20
+#define QUARK_DEV_20 0x14
#define QUARK_MMC_SDIO_FUNC 0
#define QUARK_UART0_FUNC 1
#define QUARK_USB_DEVICE_FUNC 2
@@ -22,18 +27,21 @@
#define QUARK_EMAC0_FUNC 6
#define QUARK_EMAC1_FUNC 7
-#define QUARK_DEV_21 21
+#define QUARK_DEV_21 0x15
#define QUARK_SPI0_FUNC 0
#define QUARK_SPI1_FUNC 1
#define QUARK_I2C_GPIO_FUNC 2
-#define QUARK_DEV_23 23
+#define QUARK_DEV_23 0x17
#define QUARK_PCIE0_FUNC 0
#define QUARK_PCIE1_FUNC 1
-#define QUARK_LGC_BRIDGE_DEV 31
+#define QUARK_LGC_BRIDGE_DEV 0x1f
#define QUARK_LGC_BRIDGE_FUNC 0
+#ifndef __ASSEMBLY__
+#include <pci.h>
+
#define QUARK_HOST_BRIDGE \
PCI_BDF(0, QUARK_HOST_BRIDGE_DEV, QUARK_HOST_BRIDGE_FUNC)
#define QUARK_MMC_SDIO \
@@ -64,5 +72,6 @@
PCI_BDF(0, QUARK_DEV_23, QUARK_PCIE1_FUNC)
#define QUARK_LEGACY_BRIDGE \
PCI_BDF(0, QUARK_LGC_BRIDGE_DEV, QUARK_LGC_BRIDGE_FUNC)
+#endif /* __ASSEMBLY__ */
#endif /* _QUARK_DEVICE_H_ */