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| author | Simon Glass <sjg@chromium.org> | 2020-02-06 09:54:54 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2020-02-07 22:41:24 +0800 |
| commit | 659252e7def2be650cc947df850184a3f8fcab3c (patch) | |
| tree | a846a49f86550a0e877896977884dae05cda1efc /arch/x86 | |
| parent | b4d00b256e3c784de4a33a40f4cd28a94ee2a80c (diff) | |
| download | u-boot-659252e7def2be650cc947df850184a3f8fcab3c.tar.gz u-boot-659252e7def2be650cc947df850184a3f8fcab3c.tar.bz2 u-boot-659252e7def2be650cc947df850184a3f8fcab3c.zip | |
x86: apl: Use the clock driver
Enable the Intel clock driver and modify coral's device tree to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/cpu/apollolake/Kconfig | 3 | ||||
| -rw-r--r-- | arch/x86/dts/chromebook_coral.dts | 5 |
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/cpu/apollolake/Kconfig b/arch/x86/cpu/apollolake/Kconfig index 145b8cbdf5..8a7481555e 100644 --- a/arch/x86/cpu/apollolake/Kconfig +++ b/arch/x86/cpu/apollolake/Kconfig @@ -41,6 +41,9 @@ config INTEL_APOLLOLAKE imply SMP imply HAVE_ITSS imply HAVE_P2SB + imply CLK + imply CMD_CLK + imply CLK_INTEL if INTEL_APOLLOLAKE diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index a1820fa187..a4a9e949e6 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -39,6 +39,11 @@ stdout-path = &serial; }; + clk: clock { + compatible = "intel,apl-clk"; + #clock-cells = <1>; + }; + cpus { u-boot,dm-pre-reloc; #address-cells = <1>; |