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| author | Simon Glass <sjg@chromium.org> | 2016-01-17 16:11:14 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 12:08:16 +0800 |
| commit | 5544757ce97c72119359eb47aa57d28e46fdf405 (patch) | |
| tree | b7236c701edb709f10831015681e88932d7b2af4 /arch/x86/lib/Makefile | |
| parent | 858361b174ca44cd3ae3bfd87fcd33bcfeb31188 (diff) | |
| download | u-boot-5544757ce97c72119359eb47aa57d28e46fdf405.tar.gz u-boot-5544757ce97c72119359eb47aa57d28e46fdf405.tar.bz2 u-boot-5544757ce97c72119359eb47aa57d28e46fdf405.zip | |
dm: x86: Add a northbridge uclass
Add a uclass for the northbridge / SDRAM controller found on some older
Intel chipsets.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/lib/Makefile')
| -rw-r--r-- | arch/x86/lib/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 43792bc80a..d9fc296b6e 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -19,6 +19,7 @@ obj-y += lpc-uclass.o obj-y += mpspec.o obj-$(CONFIG_ENABLE_MRC_CACHE) += mrccache.o obj-y += cmd_mtrr.o +obj-y += northbridge-uclass.o obj-$(CONFIG_I8259_PIC) += i8259.o obj-$(CONFIG_I8254_TIMER) += i8254.o ifndef CONFIG_DM_PCI |