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author | Bin Meng <bmeng.cn@gmail.com> | 2020-03-09 19:35:30 -0700 |
---|---|---|
committer | Andes <uboot@andestech.com> | 2020-03-17 11:29:54 +0800 |
commit | 1b3c8d64020f835823aedc1c4d293e34a78bd1b8 (patch) | |
tree | 1f9df90b50ed39cb27423f63f6424b633a2fd4fa /arch/riscv | |
parent | 1e32715602d3da294eaf4e70542c4be65e77a839 (diff) | |
download | u-boot-1b3c8d64020f835823aedc1c4d293e34a78bd1b8.tar.gz u-boot-1b3c8d64020f835823aedc1c4d293e34a78bd1b8.tar.bz2 u-boot-1b3c8d64020f835823aedc1c4d293e34a78bd1b8.zip |
riscv: Introduce a new config for SBI v0.1
We now have SBI v0.2 which is more scalable and extendable to handle
future needs for RISC-V supervisor interfaces.
Introduce a new config and move all SBI v0.1 code under that config.
This allows to implement the new replacement SBI extensions cleanly
and remove v0.1 extensions easily in future. Currently, the config
is enabled by default. Once all M-mode software, with v0.1, is no
longer in use, this config option and all relevant code can be easily
removed.
This commit is inspired from Linux kernel patch:
https://patchwork.kernel.org/patch/11407361/
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r-- | arch/riscv/Kconfig | 8 | ||||
-rw-r--r-- | arch/riscv/include/asm/sbi.h | 4 | ||||
-rw-r--r-- | arch/riscv/lib/sbi.c | 4 |
3 files changed, 16 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 09fff05f99..cc87da7e04 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -214,6 +214,14 @@ config SBI bool default y if RISCV_SMODE || SPL_RISCV_SMODE +config SBI_V01 + bool "SBI v0.1 support" + default y + depends on SBI + help + This config allows kernel to use SBI v0.1 APIs. This will be + deprecated in future once legacy M-mode software are no longer in use. + config SBI_IPI bool depends on SBI diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 6d3114c622..c65104f492 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -12,6 +12,7 @@ #include <linux/types.h> enum sbi_ext_id { +#ifdef CONFIG_SBI_V01 SBI_EXT_0_1_SET_TIMER = 0x0, SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, @@ -21,6 +22,7 @@ enum sbi_ext_id { SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, SBI_EXT_0_1_SHUTDOWN = 0x8, +#endif SBI_EXT_BASE = 0x10, SBI_EXT_TIME = 0x54494D45, SBI_EXT_IPI = 0x735049, @@ -75,10 +77,12 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, unsigned long arg3, unsigned long arg4, unsigned long arg5); +#ifdef CONFIG_SBI_V01 void sbi_console_putchar(int ch); int sbi_console_getchar(void); void sbi_clear_ipi(void); void sbi_shutdown(void); +#endif void sbi_set_timer(uint64_t stime_value); void sbi_send_ipi(const unsigned long *hart_mask); void sbi_remote_fence_i(const unsigned long *hart_mask); diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c index 4b6a9e097e..604a3a84fe 100644 --- a/arch/riscv/lib/sbi.c +++ b/arch/riscv/lib/sbi.c @@ -39,6 +39,8 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, return ret; } +#ifdef CONFIG_SBI_V01 + /** * sbi_console_putchar() - Writes given character to the console device. * @ch: The data to be written to the console. @@ -84,6 +86,8 @@ void sbi_shutdown(void) sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0); } +#endif /* CONFIG_SBI_V01 */ + /** * sbi_set_timer() - Program the timer for next timer event. * @stime_value: The value after which next timer event should fire. |