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| author | Atish Patra <atish.patra@wdc.com> | 2020-04-21 11:15:01 -0700 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2020-04-23 10:14:16 +0800 |
| commit | d4ea649f179a69edd2cf2dd96efb9337205eb015 (patch) | |
| tree | 42bd3450a19f02aafa85e7c4fff2d3fdadcc903c /arch/riscv/lib/Makefile | |
| parent | f614753c4b91bc3b56809773aeb17da10f1231a5 (diff) | |
| download | u-boot-d4ea649f179a69edd2cf2dd96efb9337205eb015.tar.gz u-boot-d4ea649f179a69edd2cf2dd96efb9337205eb015.tar.bz2 u-boot-d4ea649f179a69edd2cf2dd96efb9337205eb015.zip | |
riscv: Provide a mechanism to fix DT for reserved memory
In RISC-V, M-mode software can reserve physical memory regions
by setting appropriate physical memory protection (PMP) csr. As the
PMP csr are accessible only in M-mode, S-mode U-Boot can not read
this configuration directly. However, M-mode software can pass this
information via reserved-memory node in device tree so that S-mode
software can access this information.
This patch provides a framework to copy to the reserved-memory node
from one DT to another. This will be used to update the DT used by
U-Boot and the DT passed to the next stage OS.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/riscv/lib/Makefile')
| -rw-r--r-- | arch/riscv/lib/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index bd7b2c4d16..b5e93244e0 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -24,6 +24,7 @@ obj-y += reset.o obj-y += setjmp.o obj-$(CONFIG_$(SPL_)SMP) += smp.o obj-$(CONFIG_SPL_BUILD) += spl.o +obj-y += fdt_fixup.o # For building EFI apps CFLAGS_$(EFI_CRT0) := $(CFLAGS_EFI) |