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authorTom Rini <trini@konsulko.com>2023-07-19 07:59:34 -0400
committerTom Rini <trini@konsulko.com>2023-07-19 07:59:34 -0400
commit5dcfc99b2b17fa1497adea47a50bf7c7a6ba5709 (patch)
tree1aa4938c73f78354cbd1ba18a195dc62ac2111e4 /arch/powerpc
parent6f1b951500707e46f2920c0034856ada018aabcb (diff)
parent6d249769c5249774ea0e6b218279d9415108da35 (diff)
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Merge tag 'fsl-qoriq-2023-7-13' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Enable DM_SERIAL for T2080RDB, T4240RDB, T1042D4RDB, T1024RDB
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/dts/t1023si-post.dtsi4
-rw-r--r--arch/powerpc/dts/t1024rdb-u-boot.dtsi12
-rw-r--r--arch/powerpc/dts/t1024rdb.dts6
-rw-r--r--arch/powerpc/dts/t1042d4rdb-u-boot.dtsi12
-rw-r--r--arch/powerpc/dts/t1042d4rdb.dts6
-rw-r--r--arch/powerpc/dts/t1042si-post.dtsi4
-rw-r--r--arch/powerpc/dts/t2080rdb-u-boot.dtsi12
-rw-r--r--arch/powerpc/dts/t2080rdb.dts6
-rw-r--r--arch/powerpc/dts/t2080si-post.dtsi4
-rw-r--r--arch/powerpc/dts/t4240rdb-u-boot.dtsi12
-rw-r--r--arch/powerpc/dts/t4240rdb.dts6
-rw-r--r--arch/powerpc/dts/t4240si-post.dtsi4
12 files changed, 80 insertions, 8 deletions
diff --git a/arch/powerpc/dts/t1023si-post.dtsi b/arch/powerpc/dts/t1023si-post.dtsi
index 6f666a1554..0cd34fe488 100644
--- a/arch/powerpc/dts/t1023si-post.dtsi
+++ b/arch/powerpc/dts/t1023si-post.dtsi
@@ -3,13 +3,15 @@
* T1023 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2014 Freescale Semiconductor Inc.
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2023 NXP
*
*/
&soc {
/include/ "qoriq-clockgen2.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-gpio-0.dtsi"
/include/ "qoriq-gpio-1.dtsi"
/include/ "qoriq-gpio-2.dtsi"
diff --git a/arch/powerpc/dts/t1024rdb-u-boot.dtsi b/arch/powerpc/dts/t1024rdb-u-boot.dtsi
new file mode 100644
index 0000000000..b50b922aeb
--- /dev/null
+++ b/arch/powerpc/dts/t1024rdb-u-boot.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/* Copyright 2023 NXP */
+
+&serial0 {
+ bootph-all;
+};
+
+&serial1 {
+ bootph-all;
+};
+
+#include "u-boot.dtsi"
diff --git a/arch/powerpc/dts/t1024rdb.dts b/arch/powerpc/dts/t1024rdb.dts
index eeba99f84d..afaf90cb59 100644
--- a/arch/powerpc/dts/t1024rdb.dts
+++ b/arch/powerpc/dts/t1024rdb.dts
@@ -3,7 +3,7 @@
* T1024RDB Device Tree Source
*
* Copyright 2013 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2023 NXP
*/
/include/ "t102x.dtsi"
@@ -17,6 +17,10 @@
aliases {
sg_2500_aqr105_phy4 = &sg_2500_aqr105_phy4;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
spi0 = &espi0;
};
diff --git a/arch/powerpc/dts/t1042d4rdb-u-boot.dtsi b/arch/powerpc/dts/t1042d4rdb-u-boot.dtsi
new file mode 100644
index 0000000000..b50b922aeb
--- /dev/null
+++ b/arch/powerpc/dts/t1042d4rdb-u-boot.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/* Copyright 2023 NXP */
+
+&serial0 {
+ bootph-all;
+};
+
+&serial1 {
+ bootph-all;
+};
+
+#include "u-boot.dtsi"
diff --git a/arch/powerpc/dts/t1042d4rdb.dts b/arch/powerpc/dts/t1042d4rdb.dts
index 5e9fab7a10..0230d3ba67 100644
--- a/arch/powerpc/dts/t1042d4rdb.dts
+++ b/arch/powerpc/dts/t1042d4rdb.dts
@@ -3,7 +3,7 @@
* T1042D4RDB Device Tree Source
*
* Copyright 2013 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019-2021 NXP
+ * Copyright 2019-2023 NXP
*/
/include/ "t104x.dtsi"
@@ -17,6 +17,10 @@
aliases {
spi0 = &espi0;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
};
};
diff --git a/arch/powerpc/dts/t1042si-post.dtsi b/arch/powerpc/dts/t1042si-post.dtsi
index eebbbaf0e1..9f4fd7216a 100644
--- a/arch/powerpc/dts/t1042si-post.dtsi
+++ b/arch/powerpc/dts/t1042si-post.dtsi
@@ -3,11 +3,13 @@
* T1042 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
- * Copyright 2021 NXP
+ * Copyright 2021-2023 NXP
*
*/
&soc {
/include/ "qoriq-clockgen2.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-gpio-0.dtsi"
/include/ "qoriq-gpio-1.dtsi"
/include/ "qoriq-gpio-2.dtsi"
diff --git a/arch/powerpc/dts/t2080rdb-u-boot.dtsi b/arch/powerpc/dts/t2080rdb-u-boot.dtsi
new file mode 100644
index 0000000000..b50b922aeb
--- /dev/null
+++ b/arch/powerpc/dts/t2080rdb-u-boot.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/* Copyright 2023 NXP */
+
+&serial0 {
+ bootph-all;
+};
+
+&serial1 {
+ bootph-all;
+};
+
+#include "u-boot.dtsi"
diff --git a/arch/powerpc/dts/t2080rdb.dts b/arch/powerpc/dts/t2080rdb.dts
index 4de814ea8d..c0b0bd6f2c 100644
--- a/arch/powerpc/dts/t2080rdb.dts
+++ b/arch/powerpc/dts/t2080rdb.dts
@@ -3,7 +3,7 @@
* T2080RDB Device Tree Source
*
* Copyright 2013 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019-2021 NXP
+ * Copyright 2019-2023 NXP
*/
/include/ "t2080.dtsi"
@@ -17,6 +17,10 @@
aliases {
spi0 = &espi0;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
};
};
diff --git a/arch/powerpc/dts/t2080si-post.dtsi b/arch/powerpc/dts/t2080si-post.dtsi
index c06526b3db..46053c6b87 100644
--- a/arch/powerpc/dts/t2080si-post.dtsi
+++ b/arch/powerpc/dts/t2080si-post.dtsi
@@ -3,12 +3,14 @@
* T2080 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2013 Freescale Semiconductor Inc.
- * Copyright 2021 NXP
+ * Copyright 2021-2023 NXP
*
*/
&soc {
/include/ "qoriq-clockgen2.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-gpio-0.dtsi"
/include/ "qoriq-gpio-1.dtsi"
/include/ "qoriq-gpio-2.dtsi"
diff --git a/arch/powerpc/dts/t4240rdb-u-boot.dtsi b/arch/powerpc/dts/t4240rdb-u-boot.dtsi
new file mode 100644
index 0000000000..b50b922aeb
--- /dev/null
+++ b/arch/powerpc/dts/t4240rdb-u-boot.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/* Copyright 2023 NXP */
+
+&serial0 {
+ bootph-all;
+};
+
+&serial1 {
+ bootph-all;
+};
+
+#include "u-boot.dtsi"
diff --git a/arch/powerpc/dts/t4240rdb.dts b/arch/powerpc/dts/t4240rdb.dts
index b3251e330d..c33b4982ba 100644
--- a/arch/powerpc/dts/t4240rdb.dts
+++ b/arch/powerpc/dts/t4240rdb.dts
@@ -3,7 +3,7 @@
* T4240RDB Device Tree Source
*
* Copyright 2013 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019-2021 NXP
+ * Copyright 2019-2023 NXP
*/
/include/ "t4240.dtsi"
@@ -17,6 +17,10 @@
aliases {
spi0 = &espi0;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
};
};
diff --git a/arch/powerpc/dts/t4240si-post.dtsi b/arch/powerpc/dts/t4240si-post.dtsi
index 9fa99ae771..bd93345d38 100644
--- a/arch/powerpc/dts/t4240si-post.dtsi
+++ b/arch/powerpc/dts/t4240si-post.dtsi
@@ -3,11 +3,13 @@
* T4240 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
- * Copyright 2021 NXP
+ * Copyright 2021-2023 NXP
*
*/
&soc {
/include/ "qoriq-clockgen2.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-gpio-0.dtsi"
/include/ "qoriq-gpio-1.dtsi"
/include/ "qoriq-gpio-2.dtsi"