diff options
author | William Zhang <william.zhang@broadcom.com> | 2022-08-22 11:31:41 -0700 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2022-10-31 08:55:41 -0400 |
commit | dc244ca33a8e6363dd71edd9e2beb09c7653f78f (patch) | |
tree | f48648139372f40068c87acfaea622876ec4567e /arch/arm | |
parent | b4582f5df43f71e1a11083fe54c2dca5ac0bfba7 (diff) | |
download | u-boot-dc244ca33a8e6363dd71edd9e2beb09c7653f78f.tar.gz u-boot-dc244ca33a8e6363dd71edd9e2beb09c7653f78f.tar.bz2 u-boot-dc244ca33a8e6363dd71edd9e2beb09c7653f78f.zip |
arm: bcmbca: add bcm6856 SoC support under CONFIG_ARCH_BCMBCA
BCM6856 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family. Like other Broadband
SoC, this patch adds it under CONFIG_BCM6856 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and Broadcom uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from
linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/dts/bcm6856.dtsi | 103 | ||||
-rw-r--r-- | arch/arm/dts/bcm96856.dts | 30 | ||||
-rw-r--r-- | arch/arm/mach-bcmbca/Kconfig | 11 | ||||
-rw-r--r-- | arch/arm/mach-bcmbca/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-bcmbca/bcm6856/Kconfig | 17 | ||||
-rw-r--r-- | arch/arm/mach-bcmbca/bcm6856/Makefile | 5 | ||||
-rw-r--r-- | arch/arm/mach-bcmbca/bcm6856/mmu_table.c | 32 |
8 files changed, 201 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a69141d83e..1fb8f83aca 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1199,6 +1199,8 @@ dtb-$(CONFIG_BCM6813) += \ bcm96813.dtb dtb-$(CONFIG_BCM6846) += \ bcm96846.dtb +dtb-$(CONFIG_BCM6856) += \ + bcm96856.dtb dtb-$(CONFIG_BCM6878) += \ bcm96878.dtb diff --git a/arch/arm/dts/bcm6856.dtsi b/arch/arm/dts/bcm6856.dtsi new file mode 100644 index 0000000000..0bce649721 --- /dev/null +++ b/arch/arm/dts/bcm6856.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "brcm,bcm6856", "brcm,bcmbca"; + #address-cells = <2>; + #size-cells = <2>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + B53_0: cpu@0 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_1: cpu@1 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&B53_0>, <&B53_1>; + }; + + clocks: clocks { + periph_clk:periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x1000 0x1000>, /* GICD */ + <0x2000 0x2000>, /* GICC */ + <0x4000 0x2000>, /* GICH */ + <0x6000 0x2000>; /* GICV */ + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | + IRQ_TYPE_LEVEL_HIGH)>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + + uart0: serial@640 { + compatible = "brcm,bcm6345-uart"; + reg = <0x640 0x18>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&periph_clk>; + clock-names = "refclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/bcm96856.dts b/arch/arm/dts/bcm96856.dts new file mode 100644 index 0000000000..032aeb75c9 --- /dev/null +++ b/arch/arm/dts/bcm96856.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6856.dtsi" + +/ { + model = "Broadcom BCM96856 Reference Board"; + compatible = "brcm,bcm96856", "brcm,bcm6856", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig index d78618820b..f35f02c597 100644 --- a/arch/arm/mach-bcmbca/Kconfig +++ b/arch/arm/mach-bcmbca/Kconfig @@ -83,6 +83,16 @@ config BCM6846 select DM_SERIAL select BCM6345_SERIAL +config BCM6856 + bool "Support for Broadcom 6856 Family" + select ARM64 + select SYS_ARCH_TIMER + select DM_SERIAL + select BCM6345_SERIAL + help + Broadcom BCM6856 is a dual core Brahma-B53 ARMv8 based xPON Gateway + SoC. This SoC family includes BCM6856, BCM6836 and BCM4910. + config BCM6878 bool "Support for Broadcom 6878 Family" select SYS_ARCH_TIMER @@ -101,6 +111,7 @@ source "arch/arm/mach-bcmbca/bcm63178/Kconfig" source "arch/arm/mach-bcmbca/bcm6756/Kconfig" source "arch/arm/mach-bcmbca/bcm6813/Kconfig" source "arch/arm/mach-bcmbca/bcm6846/Kconfig" +source "arch/arm/mach-bcmbca/bcm6856/Kconfig" source "arch/arm/mach-bcmbca/bcm6878/Kconfig" endif diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile index e5df60e764..20f8275120 100644 --- a/arch/arm/mach-bcmbca/Makefile +++ b/arch/arm/mach-bcmbca/Makefile @@ -14,4 +14,5 @@ obj-$(CONFIG_BCM63178) += bcm63178/ obj-$(CONFIG_BCM6756) += bcm6756/ obj-$(CONFIG_BCM6813) += bcm6813/ obj-$(CONFIG_BCM6846) += bcm6846/ +obj-$(CONFIG_BCM6856) += bcm6856/ obj-$(CONFIG_BCM6878) += bcm6878/ diff --git a/arch/arm/mach-bcmbca/bcm6856/Kconfig b/arch/arm/mach-bcmbca/bcm6856/Kconfig new file mode 100644 index 0000000000..6ac75cb840 --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm6856/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# + +if BCM6856 + +config TARGET_BCM96856 + bool "Broadcom 6856 Reference Board" + depends on ARCH_BCMBCA + +config SYS_SOC + default "bcm6856" + +source "board/broadcom/bcmbca/Kconfig" + +endif diff --git a/arch/arm/mach-bcmbca/bcm6856/Makefile b/arch/arm/mach-bcmbca/bcm6856/Makefile new file mode 100644 index 0000000000..6262497703 --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm6856/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# +obj-y += mmu_table.o diff --git a/arch/arm/mach-bcmbca/bcm6856/mmu_table.c b/arch/arm/mach-bcmbca/bcm6856/mmu_table.c new file mode 100644 index 0000000000..8e53b4929e --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm6856/mmu_table.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2022 Broadcom Ltd. + */ +#include <common.h> +#include <asm/armv8/mmu.h> +#include <linux/sizes.h> + +static struct mm_region bcm96856_mem_map[] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, + .size = 1UL * SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, + { + /* SoC peripheral */ + .virt = 0xff800000UL, + .phys = 0xff800000UL, + .size = 0x100000, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, + { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = bcm96856_mem_map; |