arm: dts: k3-j721e-sk/common-proc-board: Fix boot

Since commit 9e644284ab81 ("dm: core: Report bootph-pre-ram/sram node
as pre-reloc after relocation") A53 u-boot proper is broken. This is
because nodes marked as 'bootph-pre-ram' are not available at u-boot
proper before relocation.

To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'.

Fixes: 69b19ca67bcb ("arm: dts: k3-j721e: Sync with v6.6-rc1")
Cc: Neha Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Tom Rini <trini@konsulko.com> # J721E-EVM GP
Tested-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>

2 files changed, 76 insertions, 76 deletions

diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index c638af63c1..cd95907b98 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -6,27 +6,27 @@
 #include "k3-j721e-binman.dtsi"
 
 &cbass_main {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_navss {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &cbass_mcu_wakeup {
-	bootph-pre-ram;
+	bootph-all;
 
 	chipid@43000014 {
-		bootph-pre-ram;
+		bootph-all;
 	};
 };
 
 &mcu_navss {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &mcu_ringacc {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &mcu_udmap {
@@ -38,144 +38,144 @@
 		<0x0 0x28400000 0x0 0x2000>;
 	reg-names = "gcfg", "rchan", "rchanrt", "tchan",
 		    "tchanrt", "rflow";
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &secure_proxy_main {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &dmsc {
-	bootph-pre-ram;
+	bootph-all;
 	k3_sysreset: sysreset-controller {
 		compatible = "ti,sci-sysreset";
-		bootph-pre-ram;
+		bootph-all;
 	};
 };
 
 &k3_pds {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &k3_clks {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &k3_reset {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &wkup_pmx0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_pmx0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_uart0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &mcu_uart0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_sdhci0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_sdhci1 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_uart0_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_usbss0_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &usbss0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &usb0 {
 	dr_mode = "peripheral";
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_mmc1_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &wkup_i2c0_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &wkup_uart0 {
-	bootph-pre-ram;
+	bootph-all;
 	status = "okay";
 };
 
 &wkup_i2c0 {
-	bootph-pre-ram;
+	bootph-all;
 	status = "okay";
 };
 
 &main_i2c0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_i2c0_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_esm {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &exp2 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &mcu_fss0_ospi0_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &fss {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &wkup_gpio0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &ospi0 {
-	bootph-pre-ram;
+	bootph-all;
 
 	flash@0 {
-		bootph-pre-ram;
+		bootph-all;
 	};
 };
 
 &ospi1 {
-	bootph-pre-ram;
+	bootph-all;
 
 	flash@0 {
-		bootph-pre-ram;
+		bootph-all;
 	};
 };
 
 &mcu_fss0_hpb0_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &wkup_gpio_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &mcu_fss0_ospi1_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
diff --git a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi
index 57da7c210a..370fe5190b 100644
--- a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi
@@ -6,27 +6,27 @@
 #include "k3-j721e-binman.dtsi"
 
 &cbass_main {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_navss {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &cbass_mcu_wakeup {
-	bootph-pre-ram;
+	bootph-all;
 
 	chipid@43000014 {
-		bootph-pre-ram;
+		bootph-all;
 	};
 };
 
 &mcu_navss {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &mcu_ringacc {
-		bootph-pre-ram;
+		bootph-all;
 };
 
 &mcu_udmap {
@@ -38,120 +38,120 @@
 		<0x0 0x28400000 0x0 0x2000>;
 		reg-names = "gcfg", "rchan", "rchanrt", "tchan",
 			    "tchanrt", "rflow";
-		bootph-pre-ram;
+		bootph-all;
 };
 
 &secure_proxy_main {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &dmsc {
-	bootph-pre-ram;
+	bootph-all;
 	k3_sysreset: sysreset-controller {
 		compatible = "ti,sci-sysreset";
-		bootph-pre-ram;
+		bootph-all;
 	};
 };
 
 &k3_pds {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &k3_clks {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &k3_reset {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &wkup_pmx0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_pmx0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_uart0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &mcu_uart0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_sdhci1 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_uart0_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_usbss0_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &usbss0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &usb0 {
 	dr_mode = "host";
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_usbss1_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &usbss1 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &usb1 {
 	dr_mode = "host";
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_mmc1_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &wkup_i2c0_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &wkup_i2c0 {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &wkup_uart0 {
-	bootph-pre-ram;
+	bootph-all;
 	status = "okay";
 };
 
 &mcu_fss0_ospi0_pins_default {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &fss {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &main_esm {
-	bootph-pre-ram;
+	bootph-all;
 };
 
 &ospi0 {
-	bootph-pre-ram;
+	bootph-all;
 
 	flash@0 {
-		bootph-pre-ram;
+		bootph-all;
 
 		partition@3fc0000 {
-			bootph-pre-ram;
+			bootph-all;
 		};
 	};
 };