arm64: dts: imx8mp: Add DT overlay describing i.MX8MP DHCOM SoM rev.100

The current imx8mp-dhcom-som.dtsi describes production rev.200 SoM,
add DT overlay which reinstates rev.100 SoM description to permit
prototype rev.100 SoMs to be used until they get phased out.

Signed-off-by: Marek Vasut <marex@denx.de>

4 files changed, 136 insertions, 4 deletions

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 50bdb2984a..99d8e89fb2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1064,11 +1064,13 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
 	imx8mq-phanbell.dtb \
 	imx8mp-beacon-kit.dtb \
 	imx8mp-data-modul-edm-sbc.dtb \
+	imx8mp-dhcom-som-overlay-rev100.dtbo \
 	imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
 	imx8mp-dhcom-som-overlay-eth2xfast.dtbo \
 	imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo \
 	imx8mp-dhcom-pdk2.dtb \
 	imx8mp-dhcom-pdk3.dtb \
+	imx8mp-dhcom-pdk3-overlay-rev100.dtbo \
 	imx8mp-evk.dtb \
 	imx8mp-icore-mx8mp-edimm2.2.dtb \
 	imx8mp-msc-sm2s.dtb \
diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dts b/arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dts
new file mode 100644
index 0000000000..f27e6429ab
--- /dev/null
+++ b/arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dts
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023 Marek Vasut <marex@denx.de>
+ */
+/dts-v1/;
+/plugin/;
+
+&ethphy0g {
+	reg = <7>;
+};
diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
new file mode 100644
index 0000000000..5d9a00c942
--- /dev/null
+++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023 Marek Vasut <marex@denx.de>
+ */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+#include "imx8mp-pinfunc.h"
+
+&brcmf {
+	reset-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+};
+
+&eeprom0 {	/* EEPROM with EQoS MAC address */
+	compatible = "atmel,24c02";
+	pagesize = <16>;
+};
+
+&eeprom1 {	/* EEPROM with FEC MAC address */
+	compatible = "atmel,24c02";
+	pagesize = <16>;
+};
+
+&ethphy0f { /* SMSC LAN8740Ai */
+	pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>;
+	reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
+};
+
+&ethphy0g { /* Micrel KSZ9131RNXI */
+	pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>;
+	reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
+};
+
+&i2c3 {
+	adc@48 {
+		compatible = "ti,tla2024";
+		interrupts-extended;
+	};
+};
+
+&ioexp {
+	status = "disabled";
+};
+
+&reg_eth_vio {
+	gpio = <&gpio2 10 GPIO_ACTIVE_LOW>;
+	pinctrl-0 = <&pinctrl_enet_vio>;
+	pinctrl-names = "default";
+};
+
+&rv3032 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_rtc>;
+	interrupts-extended = <&gpio5 5 IRQ_TYPE_LEVEL_LOW>;
+};
+
+&uart2 {
+	bluetooth {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_uart2_bt>;
+		shutdown-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&usb_dwc3_0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb0_vbus>;
+};
+
+&usdhc1 {
+	pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_usdhc1_wl_reg_en>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_usdhc1_wl_reg_en>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_usdhc1_wl_reg_en>;
+};
+
+&iomuxc {
+	pinctrl-0 = <&pinctrl_hog_base
+		     &pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
+		     &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
+		     &pinctrl_dhcom_g &pinctrl_dhcom_h &pinctrl_dhcom_i
+		     &pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
+		     /* GPIO_M is connected to CLKOUT2 */
+		     &pinctrl_dhcom_int>;
+
+	pinctrl_enet_vio: dhcom-enet-vio-grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10		0x22
+		>;
+	};
+
+	pinctrl_rtc: dhcom-rtc-grp {
+		fsl,pins = <
+			/* RTC_#INT Interrupt */
+			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05		0x400001c6
+		>;
+	};
+
+	pinctrl_uart2_bt: dhcom-uart2-bt-grp {
+		fsl,pins = <
+			/* BT_REG_EN */
+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x144
+		>;
+	};
+
+	pinctrl_usb0_vbus: dhcom-usb0-grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID		0x0
+		>;
+	};
+
+	pinctrl_usdhc1_wl_reg_en: dhcom-usdhc1-wl-reg-en-grp {
+		fsl,pins = <
+			/* WL_REG_EN */
+			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13		0x144
+		>;
+	};
+};
diff --git a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi
index 6f21fbe115..a29db0ddd3 100644
--- a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi
@@ -178,13 +178,13 @@
 					};
 				};
 
-				fdt-dto-imx8mp-dhcom-pdk-overlay-rev100 {
-					description = "imx8mp-dhcom-pdk-overlay-rev100";
+				fdt-dto-imx8mp-dhcom-pdk3-overlay-rev100 {
+					description = "imx8mp-dhcom-pdk3-overlay-rev100";
 					type = "flat_dt";
 					compression = "none";
 
 					blob-ext {
-						filename = "imx8mp-dhcom-pdk-overlay-rev100.dtbo";
+						filename = "imx8mp-dhcom-pdk3-overlay-rev100.dtbo";
 					};
 				};
 			};
@@ -198,7 +198,7 @@
 					      "fdt-dto-imx8mp-dhcom-som-overlay-eth2xfast",
 					      "fdt-dto-imx8mp-dhcom-pdk-overlay-eth2xfast",
 					      "fdt-dto-imx8mp-dhcom-som-overlay-rev100",
-					      "fdt-dto-imx8mp-dhcom-pdk-overlay-rev100";
+					      "fdt-dto-imx8mp-dhcom-pdk3-overlay-rev100";
 				};
 			};
 		};