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authorFabio Estevam <festevam@denx.de>2023-10-19 18:51:12 -0300
committerFabio Estevam <festevam@gmail.com>2023-12-13 09:54:00 -0300
commit21b30c237aa649f7de0ddf6140eb747e114a2063 (patch)
tree540c7555c2675ebbaf95c95e3cb19dbcf9aaa680 /arch/arm
parent7e3d6ec9bfc56dd779d4c618915bac708b7dccb6 (diff)
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imx8mp_evk: Simplify Ethernet initialization
With DM enabled, there is no need for board code to initialize the Ethernet interfaces. The RTL8211FDI Ethernet PHYs have 25MHz oscillator, so there is no need to enable the RGMII TX clk output. Also, there is no need for describing the deprecated phy-reset FEC properties, nor passing reset properties to the EQOS interface in u-boot.dtsi. Remove all these unneeded pieces. Tested both Ethernet interfaces after these changes. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/dts/imx8mp-evk-u-boot.dtsi14
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
index 0bf489b462..51c8438367 100644
--- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
@@ -137,17 +137,3 @@
&wdog1 {
bootph-pre-ram;
};
-
-&ethphy0 {
- reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
- reset-delay-us = <15000>;
- reset-post-delay-us = <100000>;
-};
-
-&fec {
- phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
- phy-reset-duration = <15>;
- phy-reset-post-delay = <100>;
-};
-
-