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authorJernej Skrabec <jernej.skrabec@gmail.com>2022-01-30 15:27:15 +0100
committerAndre Przywara <andre.przywara@arm.com>2022-04-04 23:24:17 +0100
commit35b786c1ba97ea2548ea1418352e02f7b9dfbc8b (patch)
tree8ae30f7ff8e554cf1a5e3c766e06031aebaa9148 /arch/arm/mach-sunxi
parent40a9c200aff1b855f66745a1b9961668739ef6fb (diff)
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sunxi: clock: H6: Adjust PLL LDO before clock setup
BSP boot0 adjust PLL LDO regulator before clocks are initialized. Let's do that. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'arch/arm/mach-sunxi')
-rw-r--r--arch/arm/mach-sunxi/clock_sun50i_h6.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c
index 32119ad165..7926394cf7 100644
--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c
@@ -21,6 +21,13 @@ void clock_init_safe(void)
clrbits_le32(&prcm->res_cal_ctrl, 1);
setbits_le32(&prcm->res_cal_ctrl, 1);
+ if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) {
+ /* set key field for ldo enable */
+ setbits_le32(&prcm->pll_ldo_cfg, 0xA7000000);
+ /* set PLL VDD LDO output to 1.14 V */
+ setbits_le32(&prcm->pll_ldo_cfg, 0x60000);
+ }
+
clock_set_pll1(408000000);
writel(CCM_PLL6_DEFAULT, &ccm->pll6_cfg);