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| author | Marek Vasut <marex@denx.de> | 2024-06-19 00:57:25 +0200 |
|---|---|---|
| committer | Patrick Delaunay <patrick.delaunay@foss.st.com> | 2024-09-25 19:40:27 +0200 |
| commit | 6b84683acc86f94c7dc15d621b5bca533bf8a01a (patch) | |
| tree | ebe9b4b412ccb5ff83dd10653729e5b8177229ab /arch/arm/mach-stm32mp | |
| parent | 541d21cf08ed318a6088d90a7db423b1e50e4038 (diff) | |
| download | u-boot-6b84683acc86f94c7dc15d621b5bca533bf8a01a.tar.gz u-boot-6b84683acc86f94c7dc15d621b5bca533bf8a01a.tar.bz2 u-boot-6b84683acc86f94c7dc15d621b5bca533bf8a01a.zip | |
ARM: stm32: Fix TAMP_SMCR BKP..PROT fields on STM32MP15xx
Update the TAMP_SMCR BKP..PROT fields to put first 10 registers
into protection zone 1 and next 5 into zone 2. This fixes use of
boot counter which is often in zone 3 and has to be updated from
Linux, which runs in NS.
Fixes: 73f7fc944cf6 ("ARM: stm32: Initialize TAMP_SMCR BKP..PROT fields on STM32MP15xx")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'arch/arm/mach-stm32mp')
| -rw-r--r-- | arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c index f096fe538d..ca202bec8e 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c +++ b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c @@ -148,8 +148,8 @@ static void security_init(void) */ clrsetbits_le32(TAMP_SMCR, TAMP_SMCR_BKPRWDPROT | TAMP_SMCR_BKPWDPROT, - FIELD_PREP(TAMP_SMCR_BKPRWDPROT, 0x20) | - FIELD_PREP(TAMP_SMCR_BKPWDPROT, 0x20)); + FIELD_PREP(TAMP_SMCR_BKPRWDPROT, 0x0A) | + FIELD_PREP(TAMP_SMCR_BKPWDPROT, 0x0F)); /* GPIOZ: deactivate the security */ writel(BIT(0), RCC_MP_AHB5ENSETR); |