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| author | Vitaly Andrianov <vitalya@ti.com> | 2015-09-19 16:26:44 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-10-22 14:22:19 -0400 |
| commit | 5dd6af2ecb2f661cb7b6d09bd010680f4ba0f9c8 (patch) | |
| tree | 01c6b2a06d7d2acbae6ad019f56da0a2d51d0110 /arch/arm/mach-keystone | |
| parent | 235dd6e8d1696f85e6ff536bd64bf1e4240ae368 (diff) | |
| download | u-boot-5dd6af2ecb2f661cb7b6d09bd010680f4ba0f9c8.tar.gz u-boot-5dd6af2ecb2f661cb7b6d09bd010680f4ba0f9c8.tar.bz2 u-boot-5dd6af2ecb2f661cb7b6d09bd010680f4ba0f9c8.zip | |
ARM: k2g: Add support for pin mux configuration
Add api for configuring pin mux.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/mach-keystone')
| -rw-r--r-- | arch/arm/mach-keystone/include/mach/mux-k2g.h | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm/mach-keystone/include/mach/mux-k2g.h b/arch/arm/mach-keystone/include/mach/mux-k2g.h new file mode 100644 index 0000000000..6167d2c338 --- /dev/null +++ b/arch/arm/mach-keystone/include/mach/mux-k2g.h @@ -0,0 +1,58 @@ +/* + * K2G: Pinmux configuration + * + * (C) Copyright 2015 + * Texas Instruments Incorporated, <www.ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARCH_MUX_K2G_H +#define __ASM_ARCH_MUX_K2G_H + +#include <common.h> +#include <asm/io.h> + +#define K2G_PADCFG_REG (KS2_DEVICE_STATE_CTRL_BASE + 0x1000) + +/* + * 20:19 - buffer class RW fixed + * 18 - rxactive (Input enabled for the pad ) 0 - Di; 1 - En; + * 17 - pulltypesel (0 - PULLDOWN; 1 - PULLUP); + * 16 - pulluden (0 - PULLUP/DOWN EN; 1 - DI); + * 3:0 - muxmode (available modes 0:5) + */ + +#define PIN_IEN (1 << 18) /* pin input enabled */ +#define PIN_PDIS (1 << 16) /* pull up/down disabled */ +#define PIN_PTU (1 << 17) /* pull up */ +#define PIN_PTD (0 << 17) /* pull down */ + +#define MODE(m) ((m) & 0x7) +#define MAX_PIN_N 260 + +#define MUX_CFG(value, index) \ + __raw_writel(\ + (value) | \ + (__raw_readl(K2G_PADCFG_REG + (index << 2)) & \ + (0x3 << 19)),\ + (K2G_PADCFG_REG + (index << 2))\ + ); + +struct pin_cfg { + int reg_inx; + u32 val; +}; + +static inline void configure_pin_mux(struct pin_cfg *pin_mux) +{ + if (!pin_mux) + return; + + while ((pin_mux->reg_inx >= 0) && (pin_mux->reg_inx < MAX_PIN_N)) { + MUX_CFG(pin_mux->val, pin_mux->reg_inx); + pin_mux++; + } +} + +#endif /* __ASM_ARCH_MUX_K2G_H */ |