summaryrefslogtreecommitdiff
path: root/arch/arm/mach-bcmbca
diff options
context:
space:
mode:
authorWilliam Zhang <william.zhang@broadcom.com>2022-08-05 18:34:01 -0700
committerTom Rini <trini@konsulko.com>2022-10-31 08:54:43 -0400
commitdc6117dcb35999a7f60ae443757bd4857254abc2 (patch)
treec03f4b9648626e4707a406944890a6549f986c96 /arch/arm/mach-bcmbca
parentc6e0073c0583f2557bcaf62333dab705e25e1e24 (diff)
downloadu-boot-dc6117dcb35999a7f60ae443757bd4857254abc2.tar.gz
u-boot-dc6117dcb35999a7f60ae443757bd4857254abc2.tar.bz2
u-boot-dc6117dcb35999a7f60ae443757bd4857254abc2.zip
arm: bcmbca: add bcm4912 SoC support
BCM4912 is a Broadcom B53 based WLAN AP router SoC. It is part of the BCA (Broadband Carrier Access origin) chipset family so it's added under ARCH_BCMBCA platform. This initial support includes a bare-bone implementation and dts with CPU subsystem, memory and ARM PL011 uart. This SoC is supported in the linux-next git repository so the dts and dtsi files are copied from linux. The u-boot image can be loaded from flash or network to the entry point address in the memory and boot from there to the console. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/mach-bcmbca')
-rw-r--r--arch/arm/mach-bcmbca/Kconfig8
-rw-r--r--arch/arm/mach-bcmbca/Makefile1
-rw-r--r--arch/arm/mach-bcmbca/bcm4912/Kconfig17
-rw-r--r--arch/arm/mach-bcmbca/bcm4912/Makefile5
-rw-r--r--arch/arm/mach-bcmbca/bcm4912/mmu_table.c32
5 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index 932fa19df8..acdb6defd8 100644
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -12,6 +12,13 @@ config BCM47622
select DM_SERIAL
select PL01X_SERIAL
+config BCM4912
+ bool "Support for Broadcom 4912 Family"
+ select ARM64
+ select SYS_ARCH_TIMER
+ select DM_SERIAL
+ select PL01X_SERIAL
+
config BCM63138
bool "Support for Broadcom 63138 Family"
select TIMER
@@ -63,6 +70,7 @@ config BCM6878
select PL01X_SERIAL
source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
+source "arch/arm/mach-bcmbca/bcm4912/Kconfig"
source "arch/arm/mach-bcmbca/bcm63138/Kconfig"
source "arch/arm/mach-bcmbca/bcm63146/Kconfig"
source "arch/arm/mach-bcmbca/bcm63148/Kconfig"
diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index e177b6298b..e9c96605b5 100644
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_BCM47622) += bcm47622/
+obj-$(CONFIG_BCM4912) += bcm4912/
obj-$(CONFIG_BCM63138) += bcm63138/
obj-$(CONFIG_BCM63146) += bcm63146/
obj-$(CONFIG_BCM63148) += bcm63148/
diff --git a/arch/arm/mach-bcmbca/bcm4912/Kconfig b/arch/arm/mach-bcmbca/bcm4912/Kconfig
new file mode 100644
index 0000000000..b8c14d1dc1
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4912/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM4912
+
+config TARGET_BCM94912
+ bool "Broadcom 4912 Reference Board"
+ depends on ARCH_BCMBCA
+
+config SYS_SOC
+ default "bcm4912"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif
diff --git a/arch/arm/mach-bcmbca/bcm4912/Makefile b/arch/arm/mach-bcmbca/bcm4912/Makefile
new file mode 100644
index 0000000000..6262497703
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4912/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj-y += mmu_table.o
diff --git a/arch/arm/mach-bcmbca/bcm4912/mmu_table.c b/arch/arm/mach-bcmbca/bcm4912/mmu_table.c
new file mode 100644
index 0000000000..52a53a2c76
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4912/mmu_table.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <linux/sizes.h>
+
+static struct mm_region bcm94912_mem_map[] = {
+ {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 1UL * SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ },
+ {
+ /* SoC peripheral */
+ .virt = 0xff800000UL,
+ .phys = 0xff800000UL,
+ .size = 0x100000,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ },
+ {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = bcm94912_mem_map;