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author | Jernej Skrabec <jernej.skrabec@siol.net> | 2021-01-06 18:02:56 +0100 |
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committer | Andre Przywara <andre.przywara@arm.com> | 2021-01-25 21:52:00 +0000 |
commit | 750cabc87bfdfa81019dfaf9ef0400db2368f9d1 (patch) | |
tree | 998091e0542f6e9ebf3388623b673e163cb76480 /arch/arm/dts/sun50i-h6-pine-h64.dts | |
parent | 219a5d5a975a9e561e801dea6c23e98f0c363683 (diff) | |
download | u-boot-750cabc87bfdfa81019dfaf9ef0400db2368f9d1.tar.gz u-boot-750cabc87bfdfa81019dfaf9ef0400db2368f9d1.tar.bz2 u-boot-750cabc87bfdfa81019dfaf9ef0400db2368f9d1.zip |
ARM: dts: sunxi: h6: Update DT files
Updated H6 DT files are based on Linux 5.11-rc1 release.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'arch/arm/dts/sun50i-h6-pine-h64.dts')
-rw-r--r-- | arch/arm/dts/sun50i-h6-pine-h64.dts | 102 |
1 files changed, 79 insertions, 23 deletions
diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts index 1898345183..961732c52a 100644 --- a/arch/arm/dts/sun50i-h6-pine-h64.dts +++ b/arch/arm/dts/sun50i-h6-pine-h64.dts @@ -1,30 +1,38 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) -/* - * Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.io> - */ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.io> /dts-v1/; #include "sun50i-h6.dtsi" +#include "sun50i-h6-cpu-opp.dtsi" #include <dt-bindings/gpio/gpio.h> / { - model = "Pine H64"; + model = "Pine H64 model A"; compatible = "pine64,pine-h64", "allwinner,sun50i-h6"; aliases { ethernet0 = &emac; serial0 = &uart0; + spi0 = &spi0; }; chosen { stdout-path = "serial0:115200n8"; }; - connector { + ext_osc32k: ext_osc32k_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "ext_osc32k"; + }; + + hdmi_connector: connector { compatible = "hdmi-connector"; type = "a"; + ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ port { hdmi_con_in: endpoint { @@ -52,6 +60,16 @@ }; }; + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc-gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + reg_usb_vbus: vbus { compatible = "regulator-fixed"; regulator-name = "usb-vbus"; @@ -63,25 +81,35 @@ }; }; +&cpu0 { + cpu-supply = <®_dcdca>; +}; + +&de { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; +}; + &emac { pinctrl-names = "default"; pinctrl-0 = <&ext_rgmii_pins>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_aldo2>; + phy-supply = <®_gmac_3v3>; allwinner,rx-delay-ps = <200>; allwinner,tx-delay-ps = <200>; status = "okay"; }; -&mdio { - ext_rgmii_phy: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; - }; -}; - -&de { +&gpu { + mali-supply = <®_dcdcc>; status = "okay"; }; @@ -95,12 +123,11 @@ }; }; -&ehci0 { - status = "okay"; -}; - -&ehci3 { - status = "okay"; +&mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; }; &mmc0 { @@ -216,13 +243,16 @@ reg_dcdca: dcdca { regulator-always-on; regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; + regulator-max-microvolt = <1160000>; + regulator-ramp-delay = <2500>; regulator-name = "vdd-cpu"; }; reg_dcdcc: dcdcc { + regulator-enable-ramp-delay = <32000>; regulator-min-microvolt = <810000>; regulator-max-microvolt = <1080000>; + regulator-ramp-delay = <2500>; regulator-name = "vdd-gpu"; }; @@ -255,10 +285,36 @@ }; }; +&r_ir { + status = "okay"; +}; + &r_pio { vcc-pm-supply = <®_aldo1>; }; +&rtc { + clocks = <&ext_osc32k>; +}; + +/* + * The CS pin is shared with the MMC2 CMD pin, so we cannot have the SPI + * flash and eMMC at the same time, as one of them would fail probing. + * Disable SPI0 in here, to prefer the more useful eMMC. U-Boot can + * fix this up in no eMMC is connected. + */ +&spi0 { + pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>; + pinctrl-names = "default"; + status = "disabled"; + + flash@0 { + compatible = "winbond,w25q128", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <4000000>; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_ph_pins>; |