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| author | Thomas Chou <thomas@wytron.com.tw> | 2015-11-19 21:48:08 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-11-21 21:50:15 -0500 |
| commit | 98a51fc3d767a49195e3cfc2061849b77e3563db (patch) | |
| tree | 82e850f311f164e6d6adf53bf7211c5cc8d58d4a /arch/arm/dts/rk3288.dtsi | |
| parent | f27445cbdc3cdfef0d1e98b05f6ef0cc09c7d967 (diff) | |
| download | u-boot-98a51fc3d767a49195e3cfc2061849b77e3563db.tar.gz u-boot-98a51fc3d767a49195e3cfc2061849b77e3563db.tar.bz2 u-boot-98a51fc3d767a49195e3cfc2061849b77e3563db.zip | |
ns16550: unify serial_rockchip
Unify serial_rockchip, and use the generic binding.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts/rk3288.dtsi')
| -rw-r--r-- | arch/arm/dts/rk3288.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi index 0f49709967..ac367f85b9 100644 --- a/arch/arm/dts/rk3288.dtsi +++ b/arch/arm/dts/rk3288.dtsi @@ -324,6 +324,7 @@ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; + clock-frequency = <24000000>; clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; clock-names = "baudclk", "apb_pclk"; pinctrl-names = "default"; @@ -337,6 +338,7 @@ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; + clock-frequency = <24000000>; clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; clock-names = "baudclk", "apb_pclk"; pinctrl-names = "default"; @@ -350,6 +352,7 @@ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; + clock-frequency = <24000000>; clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; clock-names = "baudclk", "apb_pclk"; pinctrl-names = "default"; @@ -362,6 +365,7 @@ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; + clock-frequency = <24000000>; clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; clock-names = "baudclk", "apb_pclk"; pinctrl-names = "default"; @@ -375,6 +379,7 @@ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; + clock-frequency = <24000000>; clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; clock-names = "baudclk", "apb_pclk"; pinctrl-names = "default"; |