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| author | Stephen Carlson <stcarlso@linux.microsoft.com> | 2022-03-29 14:51:10 -0700 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2022-04-26 17:13:57 +0530 |
| commit | 3b06577ab4eefd954348f1dc0f5abb3408d10d0c (patch) | |
| tree | bf9dc526c7e09cc4486a5509c0b0131b262f5e7a /arch/arm/cpu | |
| parent | aaaa1be8f043ff9412f9c35c62a05bcf218eda34 (diff) | |
| download | u-boot-3b06577ab4eefd954348f1dc0f5abb3408d10d0c.tar.gz u-boot-3b06577ab4eefd954348f1dc0f5abb3408d10d0c.tar.bz2 u-boot-3b06577ab4eefd954348f1dc0f5abb3408d10d0c.zip | |
armv8/fsl-lsch3: Suppress spurious warning on Layerscape CPUs
NXP/Freescale Layerscape CPUs support high-speed serial interfaces (SERDES)
that can be configured for the application. Interfaces not used by the
application can be set to protocol 0 to turn them off and save power, but
U-Boot would emit a warning that 0 was invalid for a SERDES protocol on
boot. Replace the warning text with a notice that the SERDES is disabled.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c index fad7a93566..181bd9c1b4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c @@ -147,10 +147,14 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask, cfg >>= sd_prctl_shift; cfg = serdes_get_number(sd, cfg); - printf("Using SERDES%d Protocol: %d (0x%x)\n", sd + 1, cfg, cfg); + if (cfg == 0) { + printf("SERDES%d is disabled\n", sd + 1); + } else { + printf("Using SERDES%d Protocol: %d (0x%x)\n", sd + 1, cfg, cfg); - if (!is_serdes_prtcl_valid(sd, cfg)) - printf("SERDES%d[PRTCL] = 0x%x is not valid\n", sd + 1, cfg); + if (!is_serdes_prtcl_valid(sd, cfg)) + printf("SERDES%d[PRTCL] = 0x%x is not valid\n", sd + 1, cfg); + } for (lane = 0; lane < SRDS_MAX_LANES; lane++) { enum srds_prtcl lane_prtcl = serdes_get_prtcl(sd, cfg, lane); |