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| author | Michal Simek <michal.simek@xilinx.com> | 2017-03-02 11:02:55 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2017-06-20 16:40:58 +0200 |
| commit | b0259c840ecd7ec35ebc5acad061bd6e2bcc847d (patch) | |
| tree | 238710979f20b6e0c8a9be150eaa27a3ddca33e9 /arch/arm/cpu/armv8 | |
| parent | 1ac237b66b7fdc4b867b1d11597f633639daded7 (diff) | |
| download | u-boot-b0259c840ecd7ec35ebc5acad061bd6e2bcc847d.tar.gz u-boot-b0259c840ecd7ec35ebc5acad061bd6e2bcc847d.tar.bz2 u-boot-b0259c840ecd7ec35ebc5acad061bd6e2bcc847d.zip | |
arm64: zynqmp: Add comment about level shifter mode v1
Silicon v1 didn't support SD boot mode with level shifter.
Because system can't boot any error message is not shown
that's why comment is just a record if someone tries to debug it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/cpu/armv8')
| -rw-r--r-- | arch/arm/cpu/armv8/zynqmp/spl.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c index db7432fd4b..26bf80ec52 100644 --- a/arch/arm/cpu/armv8/zynqmp/spl.c +++ b/arch/arm/cpu/armv8/zynqmp/spl.c @@ -84,7 +84,7 @@ u32 spl_boot_device(void) return BOOT_DEVICE_RAM; #ifdef CONFIG_SPL_MMC_SUPPORT case SD_MODE1: - case SD1_LSHFT_MODE: + case SD1_LSHFT_MODE: /* not working on silicon v1 */ /* if both controllers enabled, then these two are the second controller */ #if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1) return BOOT_DEVICE_MMC2; |