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| author | Alison Wang <b18965@freescale.com> | 2017-06-08 16:15:14 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-08-01 08:28:56 -0700 |
| commit | 020b3ce8aeec1f452c2a3a7d37c53b4d1574ec35 (patch) | |
| tree | fc2dbfa4f6a1a413242c1ce19868a9a8d9b87f21 /arch/arm/cpu/armv8 | |
| parent | 4df24f2c40e3ae4856cc484e8d75f9cf12f9161c (diff) | |
| download | u-boot-020b3ce8aeec1f452c2a3a7d37c53b4d1574ec35.tar.gz u-boot-020b3ce8aeec1f452c2a3a7d37c53b4d1574ec35.tar.bz2 u-boot-020b3ce8aeec1f452c2a3a7d37c53b4d1574ec35.zip | |
armv8: Remove duplicate definition for IH_ARCH_ARM and IH_ARCH_ARM64
The duplicate definitions for IH_ARCH_ARM and IH_ARCH_ARM64 are removed.
The definitions in <image.h> are used.
According to this modification, the comparison between os arch and cpu
arch is done in C programming instead of ASM programming.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 8 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/mp.c | 11 |
2 files changed, 10 insertions, 9 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 619d9b7a0e..3136e3f3a2 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -497,9 +497,7 @@ slave_cpu: rev x0, x0 /* BE to LE conversion */ cpu_is_le: ldr x5, [x11, #24] - ldr x6, =IH_ARCH_DEFAULT - cmp x6, x5 - b.eq 1f + cbz x5, 1f #ifdef CONFIG_ARMV8_SWITCH_TO_EL1 adr x4, secondary_switch_to_el1 @@ -541,9 +539,7 @@ ENTRY(secondary_switch_to_el1) ldr x4, [x11] ldr x5, [x11, #24] - ldr x6, =IH_ARCH_DEFAULT - cmp x6, x5 - b.eq 2f + cbz x5, 2f ldr x5, =ES_TO_AARCH32 bl switch_to_el1 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c index 80fe1ade2e..ab61ac3662 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c @@ -29,9 +29,14 @@ void update_os_arch_secondary_cores(uint8_t os_arch) u64 *table = get_spin_tbl_addr(); int i; - for (i = 1; i < CONFIG_MAX_CPUS; i++) - table[i * WORDS_PER_SPIN_TABLE_ENTRY + - SPIN_TABLE_ELEM_OS_ARCH_IDX] = os_arch; + for (i = 1; i < CONFIG_MAX_CPUS; i++) { + if (os_arch == IH_ARCH_DEFAULT) + table[i * WORDS_PER_SPIN_TABLE_ENTRY + + SPIN_TABLE_ELEM_ARCH_COMP_IDX] = OS_ARCH_SAME; + else + table[i * WORDS_PER_SPIN_TABLE_ENTRY + + SPIN_TABLE_ELEM_ARCH_COMP_IDX] = OS_ARCH_DIFF; + } } #ifdef CONFIG_FSL_LSCH3 |