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| author | Tom Rini <trini@konsulko.com> | 2022-06-27 10:15:50 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-06-27 10:15:50 -0400 |
| commit | c316ee674f25b73285f241ce922307296616a92a (patch) | |
| tree | 9067e60451612dee5fbd0d3132548d3e84063f53 /arch/Kconfig | |
| parent | 31016a5a853cb5b8e27e9fdf956d8250ae59eca9 (diff) | |
| parent | 728a86edb63a647e6faf211c0dbc7bd0e4ff7ac6 (diff) | |
| download | u-boot-c316ee674f25b73285f241ce922307296616a92a.tar.gz u-boot-c316ee674f25b73285f241ce922307296616a92a.tar.bz2 u-boot-c316ee674f25b73285f241ce922307296616a92a.zip | |
Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.10
cpu:
- Add driver for microblaze cpu
net:
- Add support for DM_ETH_PHY to AXI emac and emaclite
xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS
zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize
versal:
- Enable loading app at EL1
serial:
- Setup default address and clock rates for DEBUG uarts
pinctrl:
- Add support for tri state and output enable properties
relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze
microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support
timer:
- Extract axi timer driver from Microblaze to generic location
Diffstat (limited to 'arch/Kconfig')
| -rw-r--r-- | arch/Kconfig | 32 |
1 files changed, 27 insertions, 5 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index eab89f255b..d35a590f93 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -8,9 +8,6 @@ config CREATE_ARCH_SYMLINK config HAVE_ARCH_IOREMAP bool -config NEEDS_MANUAL_RELOC - bool - config SYS_CACHE_SHIFT_4 bool @@ -76,9 +73,12 @@ config M68K config MICROBLAZE bool "MicroBlaze architecture" - select NEEDS_MANUAL_RELOC select SUPPORT_OF_CONTROL - imply CMD_IRQ + imply CMD_TIMER + imply SPL_REGMAP if SPL + imply SPL_TIMER if SPL + imply TIMER + imply XILINX_TIMER config MIPS bool "MIPS architecture" @@ -452,3 +452,25 @@ source "arch/xtensa/Kconfig" source "arch/riscv/Kconfig" source "board/keymile/Kconfig" + +if MIPS || MICROBLAZE + +choice + prompt "Endianness selection" + help + Some MIPS boards can be configured for either little or big endian + byte order. These modes require different U-Boot images. In general there + is one preferred byteorder for a particular system but some systems are + just as commonly used in the one or the other endianness. + +config SYS_BIG_ENDIAN + bool "Big endian" + depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE + +config SYS_LITTLE_ENDIAN + bool "Little endian" + depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE + +endchoice + +endif |