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| author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2014-10-29 22:33:09 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-12-05 08:06:08 -0800 |
| commit | 9f074e67f5a2131336ff1838f2a82e0c2e15d33c (patch) | |
| tree | 8c84aabef031962bc68e57740e9cebd54ffb6523 /README | |
| parent | 1b2af9b4e23d396dca3eaa06fc9804659d22df0d (diff) | |
| download | u-boot-9f074e67f5a2131336ff1838f2a82e0c2e15d33c.tar.gz u-boot-9f074e67f5a2131336ff1838f2a82e0c2e15d33c.tar.bz2 u-boot-9f074e67f5a2131336ff1838f2a82e0c2e15d33c.zip | |
powerpc/mpc85xx:Put errata number for T104x NAND boot issue
When device is configured to load RCW from NAND flash IFC_A[16:31] are driven
low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using
IFC_A[16:31] lines are not accessible.
Workaround is already in-place.
Put the errata number to adhere errata handling framework.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'README')
| -rw-r--r-- | README | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -409,6 +409,10 @@ The following options need to be configured: Enables a workaround for IFC erratum A003399. It is only requred during NOR boot. + CONFIG_A008044_WORKAROUND + Enables a workaround for T1040/T1042 erratum A008044. It is only + requred during NAND boot and valid for Rev 1.0 SoC revision + CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY This is the value to write into CCSR offset 0x18600 |