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| author | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2018-09-07 19:02:06 +0200 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2018-09-22 21:04:10 +0200 |
| commit | 46203baf665c6bab72bd5945a37d9a7e0a77699a (patch) | |
| tree | 11dc24ca3159708afca9207372934b323363907d /README | |
| parent | 5ef337a0371e2b2c7905e7e20a38b6bfc80bb708 (diff) | |
| download | u-boot-46203baf665c6bab72bd5945a37d9a7e0a77699a.tar.gz u-boot-46203baf665c6bab72bd5945a37d9a7e0a77699a.tar.bz2 u-boot-46203baf665c6bab72bd5945a37d9a7e0a77699a.zip | |
MIPS: cache: remove config option CONFIG_SYS_MIPS_CACHE_MODE
Caches should be configured to mode CONF_CM_CACHABLE_NONCOHERENT
(or CONF_CM_CACHABLE_COW when a CM is available). There is no
need to make this configurable.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'README')
| -rw-r--r-- | README | 14 |
1 files changed, 0 insertions, 14 deletions
@@ -528,20 +528,6 @@ The following options need to be configured: pointer. This is needed for the temporary stack before relocation. - CONFIG_SYS_MIPS_CACHE_MODE - - Cache operation mode for the MIPS CPU. - See also arch/mips/include/asm/mipsregs.h. - Possible values are: - CONF_CM_CACHABLE_NO_WA - CONF_CM_CACHABLE_WA - CONF_CM_UNCACHED - CONF_CM_CACHABLE_NONCOHERENT - CONF_CM_CACHABLE_CE - CONF_CM_CACHABLE_COW - CONF_CM_CACHABLE_CUW - CONF_CM_CACHABLE_ACCELERATED - CONFIG_XWAY_SWAP_BYTES Enable compilation of tools/xway-swap-bytes needed for Lantiq |