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author | Mario Six <mario.six@gdsys.cc> | 2018-08-06 10:23:46 +0200 |
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committer | Simon Glass <sjg@chromium.org> | 2018-09-18 08:12:21 -0600 |
commit | d2166319df17286b2a3e2a1a7ce89f01e4f8bac9 (patch) | |
tree | b102f2c59d51a124be29bf9f4e6a0bae60e6fdab /Documentation | |
parent | 19fbdca47b3d847824ada3ab2ed575019c88516e (diff) | |
download | u-boot-d2166319df17286b2a3e2a1a7ce89f01e4f8bac9.tar.gz u-boot-d2166319df17286b2a3e2a1a7ce89f01e4f8bac9.tar.bz2 u-boot-d2166319df17286b2a3e2a1a7ce89f01e4f8bac9.zip |
misc: Add MPC83xx serdes driver
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/misc/fsl,mpc83xx-serdes.txt | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/misc/fsl,mpc83xx-serdes.txt b/Documentation/devicetree/bindings/misc/fsl,mpc83xx-serdes.txt new file mode 100644 index 0000000000..64a9b5b154 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/fsl,mpc83xx-serdes.txt @@ -0,0 +1,24 @@ +MPC83xx SerDes controller devices + +MPC83xx SoCs contain a built-in SerDes controller that determines which +protocols (SATA, PCI Express, SGMII, ...) are used on the system's serdes lines +and how the lines are configured. + +Required properties: +- compatible: must be "fsl,mpc83xx-serdes" +- reg: must point to the serdes controller's register map +- proto: selects for which protocol the serdes lines are configured. One of + "sata", "pex", "pex-x2", "sgmii" +- serdes-clk: determines the frequency the serdes lines are configured for. One + of 100, 125, 150. +- vdd: determines whether 1.0V core VDD is used or not + +Example: + +SERDES: serdes@e3000 { + reg = <0xe3000 0x200>; + compatible = "fsl,mpc83xx-serdes"; + proto = "pex"; + serdes-clk = <100>; + vdd; +}; |