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| author | Tom Rini <trini@ti.com> | 2013-12-02 08:48:02 -0500 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-12-02 08:48:02 -0500 |
| commit | f44483b57c49282299da0e5c10073b909cdad979 (patch) | |
| tree | a7862e9e18f458f755c6fa740f02e950d459ab22 | |
| parent | 19210ae9838a867ce0243c41eafe928317c15b10 (diff) | |
| parent | 2785a4ae76330dab5e792d52fc9c449ac3d1072e (diff) | |
| download | u-boot-f44483b57c49282299da0e5c10073b909cdad979.tar.gz u-boot-f44483b57c49282299da0e5c10073b909cdad979.tar.bz2 u-boot-f44483b57c49282299da0e5c10073b909cdad979.zip | |
Merge branch 'serial' of git://git.denx.de/u-boot-microblaze
| -rw-r--r-- | drivers/serial/serial_zynq.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 050b9c0625..ff28f3c801 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -21,10 +21,6 @@ #define ZYNQ_UART_MR_PARITY_NONE 0x00000020 /* No parity mode */ -/* Some clock/baud constants */ -#define ZYNQ_UART_BDIV 15 /* Default/reset BDIV value */ -#define ZYNQ_UART_BASECLK 3125000L /* master / (bdiv + 1) */ - struct uart_zynq { u32 control; /* Control Register [8:0] */ u32 mode; /* Mode Register [10:0] */ |