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| author | Hugo Villeneuve <hugo.villeneuve@lyrtech.com> | 2008-07-10 10:46:33 -0400 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-07-13 15:05:11 +0200 |
| commit | c15947d6ce0d59925c97fdfac692476af6e262d0 (patch) | |
| tree | cf61af6158424678ae5cfe036dbbb32cb0962546 | |
| parent | 068c1b77c8f42a1a31084d2f4b1d5cc807c1a9ce (diff) | |
| download | u-boot-c15947d6ce0d59925c97fdfac692476af6e262d0.tar.gz u-boot-c15947d6ce0d59925c97fdfac692476af6e262d0.tar.bz2 u-boot-c15947d6ce0d59925c97fdfac692476af6e262d0.zip | |
ARM: Fix for broken compilation when defining CONFIG_CMD_ELF
caused by missing dcache status/enable/disable functions.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
| -rw-r--r-- | cpu/arm926ejs/cpu.c | 51 | ||||
| -rw-r--r-- | include/configs/davinci_sffsdr.h | 1 |
2 files changed, 40 insertions, 12 deletions
diff --git a/cpu/arm926ejs/cpu.c b/cpu/arm926ejs/cpu.c index 722732e589..56c6289da6 100644 --- a/cpu/arm926ejs/cpu.c +++ b/cpu/arm926ejs/cpu.c @@ -134,25 +134,52 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return (0); } -void icache_enable (void) +/* cache_bit must be either C1_IC or C1_DC */ +static void cache_enable(uint32_t cache_bit) { - ulong reg; + uint32_t reg; - reg = read_p15_c1 (); /* get control reg. */ - cp_delay (); - write_p15_c1 (reg | C1_IC); + reg = read_p15_c1(); /* get control reg. */ + cp_delay(); + write_p15_c1(reg | cache_bit); } -void icache_disable (void) +/* cache_bit must be either C1_IC or C1_DC */ +static void cache_disable(uint32_t cache_bit) { - ulong reg; + uint32_t reg; - reg = read_p15_c1 (); - cp_delay (); - write_p15_c1 (reg & ~C1_IC); + reg = read_p15_c1(); + cp_delay(); + write_p15_c1(reg & ~cache_bit); } -int icache_status (void) +void icache_enable(void) { - return (read_p15_c1 () & C1_IC) != 0; + cache_enable(C1_IC); +} + +void icache_disable(void) +{ + cache_disable(C1_IC); +} + +int icache_status(void) +{ + return (read_p15_c1() & C1_IC) != 0; +} + +void dcache_enable(void) +{ + cache_enable(C1_DC); +} + +void dcache_disable(void) +{ + cache_disable(C1_DC); +} + +int dcache_status(void) +{ + return (read_p15_c1() & C1_DC) != 0; } diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 0e49e6c159..7c860e5f00 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -137,6 +137,7 @@ #define CONFIG_CMD_SAVES #define CONFIG_CMD_NAND #define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF /* Needed to load Integrity kernel. */ #undef CONFIG_CMD_BDI #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR |