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authorJohan Jonker <jbx6244@gmail.com>2023-03-15 19:34:24 +0100
committerKever Yang <kever.yang@rock-chips.com>2023-04-21 15:16:01 +0800
commitba607e2b9a6264ffd0528c1b5b516251d7e7cf2d (patch)
treea24ddfbe0870686ee93b7c32620dea1a9bfcde4f
parent2c2d782556e4f5d9483679d1293d8436892e9fed (diff)
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arm: dts: rockchip: rk3288: partial sync pwm nodes
In order to better compare the Linux rk3288.dtsi version 6.3 -rc2 with the U-Boot version partial sync the pwm nodes. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
-rw-r--r--arch/arm/dts/rk3288.dtsi18
1 files changed, 5 insertions, 13 deletions
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index f24e9ba52e..dd1d989793 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -675,9 +675,7 @@
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pin>;
- clocks = <&cru PCLK_PWM>;
- clock-names = "pwm";
- rockchip,grf = <&grf>;
+ clocks = <&cru PCLK_RKPWM>;
status = "disabled";
};
@@ -687,9 +685,7 @@
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm1_pin>;
- clocks = <&cru PCLK_PWM>;
- clock-names = "pwm";
- rockchip,grf = <&grf>;
+ clocks = <&cru PCLK_RKPWM>;
status = "disabled";
};
@@ -699,21 +695,17 @@
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm2_pin>;
- clocks = <&cru PCLK_PWM>;
- clock-names = "pwm";
- rockchip,grf = <&grf>;
+ clocks = <&cru PCLK_RKPWM>;
status = "disabled";
};
pwm3: pwm@ff680030 {
compatible = "rockchip,rk3288-pwm";
reg = <0xff680030 0x10>;
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pin>;
- clocks = <&cru PCLK_PWM>;
- clock-names = "pwm";
- rockchip,grf = <&grf>;
+ clocks = <&cru PCLK_RKPWM>;
status = "disabled";
};