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| author | Ovidiu Panait <ovpanait@gmail.com> | 2022-10-12 08:36:56 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2022-11-22 15:02:07 +0100 |
| commit | b34bc22bd9921547246c117fb95eb58bedaceff5 (patch) | |
| tree | 870ea96b0c1f67c15d0e91d9063d29662de0b557 | |
| parent | 8272d4cb897ca15eef2f39afe488f6731312e5c2 (diff) | |
| download | u-boot-b34bc22bd9921547246c117fb95eb58bedaceff5.tar.gz u-boot-b34bc22bd9921547246c117fb95eb58bedaceff5.tar.bz2 u-boot-b34bc22bd9921547246c117fb95eb58bedaceff5.zip | |
timer: xilinx-timer: use timer_conv_64() to fix timer wrap around
Current xilinx_timer_get_count() implementation does not take into account
the periodic 32-bit wrap arounds, as it directly returns the 32-bit counter
register value. The roll-overs cause problems in the upper timer layers, as
generic timer code expects an incrementing 64-bit value from get_count() to
work correctly.
Add the missing 64-bit up-conversion to fix random hangs/delays in
__udelay().
Fixes: a36d86720f ("microblaze: Convert axi timer to DM driver")
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221012053656.1492457-3-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
| -rw-r--r-- | drivers/timer/xilinx-timer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/timer/xilinx-timer.c b/drivers/timer/xilinx-timer.c index 75b4473b63..172fd9f929 100644 --- a/drivers/timer/xilinx-timer.c +++ b/drivers/timer/xilinx-timer.c @@ -40,7 +40,7 @@ static u64 xilinx_timer_get_count(struct udevice *dev) regmap_read(priv->regs, TIMER_COUNTER_OFFSET, &value); - return value; + return timer_conv_64(value); } static int xilinx_timer_probe(struct udevice *dev) |