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| author | Paul Barker <paul.barker.ct@bp.renesas.com> | 2023-10-19 15:30:44 +0100 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2023-10-19 17:03:20 +0200 |
| commit | 966caedfa89acaeceb6968f051b7ae26c4c6673f (patch) | |
| tree | 40bbf0ca91bbee900f99584c4979cba9e570dc85 | |
| parent | 0f924d88fa0233abe49cb1c06317f1b486326a90 (diff) | |
| download | u-boot-966caedfa89acaeceb6968f051b7ae26c4c6673f.tar.gz u-boot-966caedfa89acaeceb6968f051b7ae26c4c6673f.tar.bz2 u-boot-966caedfa89acaeceb6968f051b7ae26c4c6673f.zip | |
serial: sh: Add RZ/G2L SCIF support
Extend the existing driver to support the SCIF serial ports on the
Renesas RZ/G2L (R9A07G044) SoC. This also requires us to ensure that if
there is a reset signal defined in the device tree, it is de-asserted
before we try to talk to the SCIF module.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # R-Car H3 Salvator-XS
| -rw-r--r-- | arch/arm/mach-rmobile/Kconfig | 1 | ||||
| -rw-r--r-- | drivers/serial/serial_sh.c | 15 | ||||
| -rw-r--r-- | drivers/serial/serial_sh.h | 19 |
3 files changed, 34 insertions, 1 deletions
diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig index 714eb4405b..2bb96749fc 100644 --- a/arch/arm/mach-rmobile/Kconfig +++ b/arch/arm/mach-rmobile/Kconfig @@ -77,6 +77,7 @@ config RZG2L imply PINCTRL_RZG2L imply RENESAS_SDHI imply RZG2L_GPIO + imply SCIF_CONSOLE imply SYS_MALLOC_F help Enable support for the Renesas RZ/G2L family of SoCs. Currently diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index 9a698b19cc..c034ab54e1 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -12,10 +12,12 @@ #include <asm/processor.h> #include <clk.h> #include <dm.h> +#include <dm/device_compat.h> #include <dm/platform_data/serial_sh.h> #include <errno.h> #include <linux/compiler.h> #include <linux/delay.h> +#include <reset.h> #include <serial.h> #include "serial_sh.h" @@ -199,12 +201,24 @@ static int sh_serial_probe(struct udevice *dev) { struct sh_serial_plat *plat = dev_get_plat(dev); struct uart_port *priv = dev_get_priv(dev); + struct reset_ctl rst; + int ret; priv->membase = (unsigned char *)plat->base; priv->mapbase = plat->base; priv->type = plat->type; priv->clk_mode = plat->clk_mode; + /* De-assert the module reset if it is defined. */ + ret = reset_get_by_index(dev, 0, &rst); + if (!ret) { + ret = reset_deassert(&rst); + if (ret < 0) { + dev_err(dev, "failed to de-assert reset line\n"); + return ret; + } + } + sh_serial_init_generic(priv); return 0; @@ -221,6 +235,7 @@ static const struct dm_serial_ops sh_serial_ops = { static const struct udevice_id sh_serial_id[] ={ {.compatible = "renesas,sci", .data = PORT_SCI}, {.compatible = "renesas,scif", .data = PORT_SCIF}, + {.compatible = "renesas,scif-r9a07g044", .data = PORT_SCIFA}, {.compatible = "renesas,scifa", .data = PORT_SCIFA}, {.compatible = "renesas,hscif", .data = PORT_HSCIF}, {} diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 149ec1fe73..58c2d22bc7 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -90,7 +90,7 @@ struct uart_port { # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCIF_ORER 0x0001 /* overrun error bit */ #elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_RCAR_64) || \ - defined(CONFIG_R7S72100) + defined(CONFIG_R7S72100) || defined(CONFIG_RZG2L) # if defined(CFG_SCIF_A) # define SCIF_ORER 0x0200 # else @@ -312,6 +312,9 @@ static inline void sci_##name##_out(struct uart_port *port,\ sh4_scif_offset, sh4_scif_size) #define SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) \ CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) +#elif defined(CONFIG_RZG2L) +#define SCIF_FNS(reg_name, reg_offset, reg_size) \ + CPU_SCIF_FNS(reg_name, reg_offset, reg_size) #else #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size,\ sh4_sci_offset, sh4_sci_size, \ @@ -387,6 +390,20 @@ SCIF_FNS(SCLSR, 0, 0, 0x14, 16) #else SCIF_FNS(SCLSR, 0, 0, 0x24, 16) #endif +#elif defined(CONFIG_RZG2L) +SCIF_FNS(SCSMR, 0x00, 16) +SCIF_FNS(SCBRR, 0x02, 8) +SCIF_FNS(SCSCR, 0x04, 16) +SCIF_FNS(SCxTDR, 0x06, 8) +SCIF_FNS(SCxSR, 0x08, 16) +SCIF_FNS(SCxRDR, 0x0A, 8) +SCIF_FNS(SCFCR, 0x0C, 16) +SCIF_FNS(SCFDR, 0x0E, 16) +SCIF_FNS(SCSPTR, 0x10, 16) +SCIF_FNS(SCLSR, 0x12, 16) +SCIF_FNS(SCSEMR, 0x14, 8) +SCIF_FNS(SCxTCR, 0x16, 16) +SCIF_FNS(DL, 0x00, 0) #else /* reg SCI/SH3 SCI/SH4 SCIF/SH3 SCIF/SH4 SCI/H8*/ /* name off sz off sz off sz off sz off sz*/ |