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authorHeinrich Schuchardt <heinrich.schuchardt@canonical.com>2023-09-26 09:16:34 +0200
committerLeo Yu-Chi Liang <ycliang@andestech.com>2023-10-19 17:29:32 +0800
commit9385c9b0cd9761b49033df13ccf45d3dd17f4027 (patch)
tree5074540b380b90e588fc5af21a39f80d9e7b8245
parent9a0cf3993f71043ba08c315572c54622de42d447 (diff)
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riscv: remove dram_init_banksize()
Remove dram_init_banksize() on the architecture level. Limiting used RAM to under 4 GiB is only necessary for CPUs which have a DMA issue. SoC specific code already exists for FU540, FU740, JH7110. Not all RISC-V boards will have memory below 4 GiB. A weak implementation of dram_init_banksize() exists in common/board_f.c. See the discussion in https://lore.kernel.org/u-boot/545fe813-cb1e-469c-a131-0025c77aeaa2@canonical.com/T/ Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Anup Patel <anup@brainfault.org>
-rw-r--r--arch/riscv/cpu/generic/dram.c16
1 files changed, 0 insertions, 16 deletions
diff --git a/arch/riscv/cpu/generic/dram.c b/arch/riscv/cpu/generic/dram.c
index 94d8018407..1b51bae9b6 100644
--- a/arch/riscv/cpu/generic/dram.c
+++ b/arch/riscv/cpu/generic/dram.c
@@ -20,19 +20,3 @@ int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
}
-
-phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
-{
- /*
- * Ensure that we run from first 4GB so that all
- * addresses used by U-Boot are 32bit addresses.
- *
- * This in-turn ensures that 32bit DMA capable
- * devices work fine because DMA mapping APIs will
- * provide 32bit DMA addresses only.
- */
- if (gd->ram_top >= SZ_4G)
- return SZ_4G - 1;
-
- return gd->ram_top;
-}