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author | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2023-08-14 01:51:27 +0200 |
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committer | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2023-09-09 04:53:31 +0200 |
commit | 92d5f99633e4d0a33ea1f22e28674440ddcd7072 (patch) | |
tree | af7f6af6e686ed2ef2c1321f8e0f43a20f3f95c0 | |
parent | 515e0af77b25fba24ef6a3c72afee6ae3c739825 (diff) | |
download | u-boot-92d5f99633e4d0a33ea1f22e28674440ddcd7072.tar.gz u-boot-92d5f99633e4d0a33ea1f22e28674440ddcd7072.tar.bz2 u-boot-92d5f99633e4d0a33ea1f22e28674440ddcd7072.zip |
clk: Add GPIO-controlled clock gate driver
Add driver which implements GPIO-controlled clock. The GPIO is used
as a gate to enable/disable the clock. This matches linux clk-gpio.c
driver, however this does not implement the GPIO mux part, which in
U-Boot DM would be better fit in separate driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
-rw-r--r-- | drivers/clk/Kconfig | 13 | ||||
-rw-r--r-- | drivers/clk/Makefile | 1 | ||||
-rw-r--r-- | drivers/clk/clk-gpio.c | 66 |
3 files changed, 80 insertions, 0 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 29859cdfa1..bfd23a9904 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -83,6 +83,19 @@ config CLK_COMPOSITE_CCF Enable this option if you want to (re-)use the Linux kernel's Common Clock Framework [CCF] composite code in U-Boot's clock driver. +config CLK_GPIO + bool "GPIO-controlled clock gate driver" + depends on CLK + help + Enable this option to add GPIO-controlled clock gate driver. + +config SPL_CLK_GPIO + bool "GPIO-controlled clock gate driver in SPL" + depends on SPL_CLK + help + Enable this option to add GPIO-controlled clock gate driver + in U-Boot SPL. + config CLK_BCM6345 bool "Clock controller driver for BCM6345" depends on CLK && ARCH_BMIPS diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index e22c8cf291..26bf429acb 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_factor.o obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk.o clk-divider.o clk-mux.o clk-gate.o obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-fixed-factor.o obj-$(CONFIG_$(SPL_TPL_)CLK_COMPOSITE_CCF) += clk-composite.o +obj-$(CONFIG_$(SPL_TPL_)CLK_GPIO) += clk-gpio.o obj-y += analogbits/ obj-y += imx/ diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c new file mode 100644 index 0000000000..26d795b978 --- /dev/null +++ b/drivers/clk/clk-gpio.c @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Marek Vasut <marek.vasut+renesas@mailbox.org> + */ + +#include <asm/gpio.h> +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> + +struct clk_gpio_priv { + struct gpio_desc enable; +}; + +static int clk_gpio_enable(struct clk *clk) +{ + struct clk_gpio_priv *priv = dev_get_priv(clk->dev); + + dm_gpio_set_value(&priv->enable, 1); + + return 0; +} + +static int clk_gpio_disable(struct clk *clk) +{ + struct clk_gpio_priv *priv = dev_get_priv(clk->dev); + + dm_gpio_set_value(&priv->enable, 0); + + return 0; +} + +const struct clk_ops clk_gpio_ops = { + .enable = clk_gpio_enable, + .disable = clk_gpio_disable, +}; + +static int clk_gpio_probe(struct udevice *dev) +{ + struct clk_gpio_priv *priv = dev_get_priv(dev); + + return gpio_request_by_name(dev, "enable-gpios", 0, + &priv->enable, GPIOD_IS_OUT); +} + +/* + * When implementing clk-mux-clock, use gpio_request_list_by_name + * and implement get_rate/set_rate/set_parent ops. This should be + * in a separate driver and with separate Kconfig option to enable + * that driver, since unlike Linux implementation, the U-Boot DM + * integration would be orthogonal to this driver. + */ +static const struct udevice_id clk_gpio_match[] = { + { .compatible = "gpio-gate-clock" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(gpio_gate_clock) = { + .name = "gpio_clock", + .id = UCLASS_CLK, + .of_match = clk_gpio_match, + .probe = clk_gpio_probe, + .priv_auto = sizeof(struct clk_gpio_priv), + .ops = &clk_gpio_ops, + .flags = DM_FLAG_PRE_RELOC, +}; |