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author | Yu Chien Peter Lin <peterlin@andestech.com> | 2023-02-06 16:10:50 +0800 |
---|---|---|
committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-02-17 19:07:48 +0800 |
commit | 487c211ef6720b4226853755322c862be701fd36 (patch) | |
tree | 0dba4207d816bde1b335e599b1bd47c9936c6f74 | |
parent | 600a708c0551cb31a7f4f553ec9347b0280cf21e (diff) | |
download | u-boot-487c211ef6720b4226853755322c862be701fd36.tar.gz u-boot-487c211ef6720b4226853755322c862be701fd36.tar.bz2 u-boot-487c211ef6720b4226853755322c862be701fd36.zip |
configs: ae350: Enable v5l2 cache for AE350 platforms in SPL
To reduce the code size, CONFIG_V5L2_CACHE was disabled since commit:
ca06444aac2c643db3a3f2eb37afc60fae15177e
Turing on does not significantly increase the size of u-boot-spl.bin,
so we enable it by default to improve performance.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
-rw-r--r-- | arch/riscv/cpu/ax25/Kconfig | 1 | ||||
-rw-r--r-- | configs/ae350_rv32_spl_defconfig | 2 | ||||
-rw-r--r-- | configs/ae350_rv32_spl_xip_defconfig | 2 | ||||
-rw-r--r-- | configs/ae350_rv64_spl_defconfig | 2 | ||||
-rw-r--r-- | configs/ae350_rv64_spl_xip_defconfig | 2 |
5 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig index eca68ea2a7..82bb5a2a53 100644 --- a/arch/riscv/cpu/ax25/Kconfig +++ b/arch/riscv/cpu/ax25/Kconfig @@ -6,6 +6,7 @@ config RISCV_NDS imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) imply ANDES_PLICSW if (RISCV_MMODE || SPL_RISCV_MMODE) imply ANDES_PLMT_TIMER if (RISCV_MMODE || SPL_RISCV_MMODE) + imply V5L2_CACHE imply SPL_CPU imply SPL_OPENSBI imply SPL_LOAD_FIT diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index a66db65621..f5bd7a9a7e 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -22,6 +22,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_CACHE=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 606962c0a7..014dcbedf6 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_CACHE=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index f235db7990..51d23d050d 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -22,6 +22,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_CACHE=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 4cbfd52fb1..c44df4b561 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_CACHE=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y |