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| author | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2024-08-31 22:33:37 +0200 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2024-09-09 01:10:44 +0200 |
| commit | 3faeb78378ea32922fbd00e9ddf675ce0aa526a3 (patch) | |
| tree | cb3663e1c12416444bcfdeab87e50d8e33f47767 | |
| parent | 2e255d2e6e1a8b56f594de4e6f969c97ce1aff46 (diff) | |
| download | u-boot-3faeb78378ea32922fbd00e9ddf675ce0aa526a3.tar.gz u-boot-3faeb78378ea32922fbd00e9ddf675ce0aa526a3.tar.bz2 u-boot-3faeb78378ea32922fbd00e9ddf675ce0aa526a3.zip | |
ARM: dts: renesas: Minimize R8A779G0 V4H RPC SPI DT node
The RPC SPI DT node is now part of mainline Linux DT, remove the
duplicate content from U-Boot DT extras. The SPI flash DT node name
has been changed from "spi-flash@0" to "flash@0", reflect this change
in this patch. Retain "bank-width" and "num-cs" DT properties which
are used by U-Boot. Retain "spi-rx-bus-width" and "spi-tx-bus-width"
DT properties to indicate the bus should always be operated in 1-1-1
mode as the U-Boot RPC SPI driver does not support higher bus width
modes yet.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| -rw-r--r-- | arch/arm/dts/r8a779g0-u-boot.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi | 22 |
2 files changed, 1 insertions, 22 deletions
diff --git a/arch/arm/dts/r8a779g0-u-boot.dtsi b/arch/arm/dts/r8a779g0-u-boot.dtsi index cc8becac99..f60eba531e 100644 --- a/arch/arm/dts/r8a779g0-u-boot.dtsi +++ b/arch/arm/dts/r8a779g0-u-boot.dtsi @@ -8,7 +8,6 @@ #include "r8a779x-u-boot.dtsi" &rpc { - reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>; bank-width = <2>; num-cs = <1>; }; diff --git a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi index a102639010..c3704d789e 100644 --- a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi +++ b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi @@ -13,29 +13,9 @@ }; }; -&pfc { - qspi0_pins: qspi0 { - groups = "qspi0_ctrl", "qspi0_data4"; - function = "qspi0"; - }; -}; - &rpc { - pinctrl-0 = <&qspi0_pins>; - pinctrl-names = "default"; - - #address-cells = <1>; - #size-cells = <0>; - spi-max-frequency = <40000000>; - status = "disabled"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "s25fs512s", "jedec,spi-nor"; - reg = <0>; + flash@0 { spi-tx-bus-width = <1>; spi-rx-bus-width = <1>; - spi-max-frequency = <40000000>; }; }; |