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| author | Stelian Pop <stelian@popies.net> | 2008-11-09 00:14:46 +0100 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-11-21 01:41:14 +0100 |
| commit | 3e0cda071a67cb5709e3fa4faf6b31a731859acc (patch) | |
| tree | f41e0b3d1f5c09900d841c7737741698a91c79e3 | |
| parent | ad229a44e162af0f65e57e4e3dc133d5f0364ecb (diff) | |
| download | u-boot-3e0cda071a67cb5709e3fa4faf6b31a731859acc.tar.gz u-boot-3e0cda071a67cb5709e3fa4faf6b31a731859acc.tar.bz2 u-boot-3e0cda071a67cb5709e3fa4faf6b31a731859acc.zip | |
AT91: Enable PLLB for USB
At least some (old ?) versions of the AT91Bootstrap do not set up the
PLLB correctly to 48 MHz in order to make USB host function correctly.
This patch sets up the PLLB to the same values Linux uses, and makes USB
work ok on the following CPUs:
- AT91CAP9
- AT91SAM9260
- AT91SAM9263
This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all
the relevant AT91CAP9/AT91SAM9 atmel boards.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| -rw-r--r-- | cpu/arm926ejs/at91/usb.c | 18 | ||||
| -rw-r--r-- | include/configs/afeb9260.h | 1 | ||||
| -rw-r--r-- | include/configs/at91cap9adk.h | 3 | ||||
| -rw-r--r-- | include/configs/at91sam9260ek.h | 2 | ||||
| -rw-r--r-- | include/configs/at91sam9261ek.h | 1 | ||||
| -rw-r--r-- | include/configs/at91sam9263ek.h | 2 |
6 files changed, 27 insertions, 0 deletions
diff --git a/cpu/arm926ejs/at91/usb.c b/cpu/arm926ejs/at91/usb.c index 7cb082db1b..2f5c337474 100644 --- a/cpu/arm926ejs/at91/usb.c +++ b/cpu/arm926ejs/at91/usb.c @@ -31,6 +31,15 @@ int usb_cpu_init(void) { + +#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ + defined(CONFIG_AT91SAM9263) + /* Enable PLLB */ + at91_sys_write(AT91_CKGR_PLLBR, CFG_AT91_PLLB); + while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) + ; +#endif + /* Enable USB host clock. */ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP); #ifdef CONFIG_AT91SAM9261 @@ -51,6 +60,15 @@ int usb_cpu_stop(void) #else at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP); #endif + +#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ + defined(CONFIG_AT91SAM9263) + /* Disable PLLB */ + at91_sys_write(AT91_CKGR_PLLBR, 0); + while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0) + ; +#endif + return 0; } diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 755952fe21..f077ad90f4 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -29,6 +29,7 @@ /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ #define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */ +#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 667e0496b6..aeb06ac64b 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -32,6 +32,7 @@ #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CFG_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -137,6 +138,8 @@ #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 81c8d39b24..fbc470fbe0 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -32,6 +32,7 @@ #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -123,6 +124,7 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index efe35a4b76..bd668235d3 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -137,6 +137,7 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index ef5b666311..a2b09ca9f7 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -32,6 +32,7 @@ #define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CFG_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -143,6 +144,7 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |