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| author | Felix Radensky <felix@embedded-sol.com> | 2010-01-19 21:19:06 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2010-01-21 08:18:37 +0100 |
| commit | 33c8c664239f6665b228145d7e5adfa238a300bc (patch) | |
| tree | ab107f3b8e81a557358d2b00e531b0a272ce4b3a | |
| parent | d98964aaacc5c54cf7d67bb1e5128ed067086dd7 (diff) | |
| download | u-boot-33c8c664239f6665b228145d7e5adfa238a300bc.tar.gz u-boot-33c8c664239f6665b228145d7e5adfa238a300bc.tar.bz2 u-boot-33c8c664239f6665b228145d7e5adfa238a300bc.zip | |
ppc4xx: Allow setting a single SPD EEPROM address for DDR2 DIMMs
On platforms where SPD EEPROM and another EEPROM have adjacent
I2C addresses SPD_EEPROM_ADDRESS should be defined as a single
element array, otherwise DDR2 setup code would fail with the
following error:
ERROR: Unknown DIMM detected in slot 1
However, fixing SPD_EEPROM_ADDRESS would result in another
error:
ERROR: DIMM's DDR1 and DDR2 type can not be mixed.
This happens because initdram() routine does not explicitly
initialize dimm_populated array. This patch fixes the problem.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
| -rw-r--r-- | cpu/ppc4xx/44x_spd_ddr2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index f8aa14aadb..593a286919 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -426,7 +426,7 @@ phys_size_t initdram(int board_type) unsigned char spd0[MAX_SPD_BYTES]; unsigned char spd1[MAX_SPD_BYTES]; unsigned char *dimm_spd[MAXDIMMS]; - unsigned long dimm_populated[MAXDIMMS]; + unsigned long dimm_populated[MAXDIMMS] = {SDRAM_NONE, SDRAM_NONE}; unsigned long num_dimm_banks; /* on board dimm banks */ unsigned long val; ddr_cas_id_t selected_cas = DDR_CAS_5; /* preset to silence compiler */ |