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| author | Tom Rini <trini@konsulko.com> | 2022-10-28 20:27:00 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-11-10 09:45:54 -0500 |
| commit | 22a2283f2de687b30ca257a4b3834f7686fabb56 (patch) | |
| tree | d61fadb625a6eec525f7c2034b23c1c4986d5ee4 | |
| parent | 3b677dcd9d6b1fcaa9affd2289744756bcda1165 (diff) | |
| download | u-boot-22a2283f2de687b30ca257a4b3834f7686fabb56.tar.gz u-boot-22a2283f2de687b30ca257a4b3834f7686fabb56.tar.bz2 u-boot-22a2283f2de687b30ca257a4b3834f7686fabb56.zip | |
powerpc: Migrate SYS_L2_SIZE to Kconfig
Introduce two options, one for each observed L2 cache size, and have the
size select'd as needed.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 16 | ||||
| -rw-r--r-- | include/configs/P1010RDB.h | 3 | ||||
| -rw-r--r-- | include/configs/p1_p2_rdb_pc.h | 3 |
3 files changed, 16 insertions, 6 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 27f069a1fb..7abfe26d35 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -113,6 +113,7 @@ config TARGET_P1010RDB_PA select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select SUPPORT_TPL + select SYS_L2_SIZE_256KB imply CMD_EEPROM imply CMD_SATA imply PANIC_HANG @@ -123,6 +124,7 @@ config TARGET_P1010RDB_PB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select SUPPORT_TPL + select SYS_L2_SIZE_256KB imply CMD_EEPROM imply CMD_SATA imply PANIC_HANG @@ -132,6 +134,7 @@ config TARGET_P1020RDB_PC select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + select SYS_L2_SIZE_256KB imply CMD_EEPROM imply CMD_SATA imply PANIC_HANG @@ -141,6 +144,7 @@ config TARGET_P1020RDB_PD select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + select SYS_L2_SIZE_256KB imply CMD_EEPROM imply CMD_SATA imply PANIC_HANG @@ -150,6 +154,7 @@ config TARGET_P2020RDB select SUPPORT_SPL select SUPPORT_TPL select ARCH_P2020 + select SYS_L2_SIZE_512KB imply CMD_EEPROM imply CMD_SATA imply SATA_SIL @@ -1277,6 +1282,17 @@ config SYS_ETVPE_CLK default 1 endif +config SYS_L2_SIZE_256KB + bool + +config SYS_L2_SIZE_512KB + bool + +config SYS_L2_SIZE + int + default 262144 if SYS_L2_SIZE_256KB + default 524288 if SYS_L2_SIZE_512KB + config BACKSIDE_L2_CACHE bool diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index bf9227a3c2..06188cac44 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -311,18 +311,15 @@ extern unsigned long get_sdram_size(void); #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #else #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #endif #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index ca7d728811..73bda9dc70 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -27,7 +27,6 @@ #define __SW_BOOT_NOR_BANK_UP 0x5c /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ #define __SW_BOOT_NOR_BANK_LO 0x5e /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ #define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ -#define CONFIG_SYS_L2_SIZE (256 << 10) #endif /* @@ -58,7 +57,6 @@ #define __SW_BOOT_NOR_BANK_UP 0x64 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ #define __SW_BOOT_NOR_BANK_LO 0x66 /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ #define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ -#define CONFIG_SYS_L2_SIZE (256 << 10) /* * Dynamic MTD Partition support with mtdparts */ @@ -79,7 +77,6 @@ #define __SW_BOOT_NOR_BANK_UP 0xc8 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ #define __SW_BOOT_NOR_BANK_LO 0xca /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ #define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ -#define CONFIG_SYS_L2_SIZE (512 << 10) /* * Dynamic MTD Partition support with mtdparts */ |