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authorMarek Vasut <marex@denx.de>2020-04-27 12:26:43 +0200
committerPatrick Delaunay <patrick.delaunay@st.com>2020-05-14 09:02:12 +0200
commit1e444bdc986aa56f9aaff01e1b57ed34d6ce8667 (patch)
tree15e66e23cd2f5a3ff6339895863f9ae6470a7b41
parent8d055b020aa8679d8033649d69655f299569720f (diff)
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ARM: stm32: Hog GPIO PF7 high on DHCOM to unlock SPI NOR nWP
The SPI NOR nWP line is connected to GPIO PF7 on the SoM, pull the GPIO line high by default to clear SPI NOR WP. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
-rw-r--r--arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi9
-rw-r--r--configs/stm32mp15_dhcom_basic_defconfig1
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index e59da53502..75d75266e8 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -49,6 +49,15 @@
};
};
+&gpiof {
+ snor-nwp {
+ gpio-hog;
+ gpios = <7 0>;
+ output-high;
+ line-name = "spi-nor-nwp";
+ };
+};
+
&i2c4 {
u-boot,dm-pre-reloc;
};
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index 7638234073..c1c83eb4fc 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -74,6 +74,7 @@ CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_VIRT=y
CONFIG_SET_DFU_ALT_INFO=y
+CONFIG_GPIO_HOG=y
CONFIG_DM_HWSPINLOCK=y
CONFIG_HWSPINLOCK_STM32=y
CONFIG_DM_I2C=y