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| author | Heinrich Schuchardt <xypron.glpk@gmx.de> | 2020-09-05 12:46:46 +0200 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2020-09-30 08:54:31 +0800 |
| commit | 08bff30d5d15ddeb1da82d112b8b98d1cac06889 (patch) | |
| tree | 27bdd75354b5026339ad474c3928f4aae589aaef | |
| parent | d53a95ba5e4443a4c512b03ae955c0c0b4b710fa (diff) | |
| download | u-boot-08bff30d5d15ddeb1da82d112b8b98d1cac06889.tar.gz u-boot-08bff30d5d15ddeb1da82d112b8b98d1cac06889.tar.bz2 u-boot-08bff30d5d15ddeb1da82d112b8b98d1cac06889.zip | |
doc/sipeed/maix: describe RESET and BOOT button
In the boot flow description add the RESET and BOOT button as well as the
function of the DTR and RTS lines of the serial interface.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| -rw-r--r-- | doc/board/sipeed/maix.rst | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/doc/board/sipeed/maix.rst b/doc/board/sipeed/maix.rst index 0b3a58070c..3f791b42fa 100644 --- a/doc/board/sipeed/maix.rst +++ b/doc/board/sipeed/maix.rst @@ -285,11 +285,15 @@ Technical Details Boot Sequence ^^^^^^^^^^^^^ -1. ``RESET`` pin is deasserted. +1. ``RESET`` pin is deasserted. The pin is connected to the ``RESET`` button. It + can also be set to low via either the ``DTR`` or the ``RTS`` line of the + serial interface (depending on the board). 2. Both harts begin executing at ``0x00001000``. 3. Both harts jump to firmware at ``0x88000000``. 4. One hart is chosen as a boot hart. -5. Firmware reads value of pin ``IO_16`` (ISP). +5. Firmware reads the value of pin ``IO_16`` (ISP). This pin is connected to the + ``BOOT`` button. The pin can equally be set to low via either the ``DTR`` or + ``RTS`` line of the serial interface (depending on the board). * If the pin is low, enter ISP mode. This mode allows loading data to ram, writing it to flash, and booting from specific addresses. |