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authorAlexey Brodkin <abrodkin@synopsys.com>2018-10-10 15:53:45 +0300
committerAlexey Brodkin <abrodkin@synopsys.com>2018-10-12 15:14:41 +0300
commit031154fe8f2b1b6b2a6e2d1449676a8c6dc42ebf (patch)
treec07fefddefbc265bd097d80ad90785a0b10244ba
parent7d388add5592dd65eac21fcbc77ca1cccec5fa38 (diff)
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iot_dk: Add support of 136 MHz clock
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
-rw-r--r--board/synopsys/iot_devkit/iot_devkit.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/board/synopsys/iot_devkit/iot_devkit.c b/board/synopsys/iot_devkit/iot_devkit.c
index fb39e6d50c..04e003c31f 100644
--- a/board/synopsys/iot_devkit/iot_devkit.c
+++ b/board/synopsys/iot_devkit/iot_devkit.c
@@ -68,6 +68,14 @@ static int set_cpu_freq(unsigned int clk)
writel((readl(PLLCON) & PLL_MASK_2) | 0x200191, PLLCON);
break;
+ case 136:
+ writel(readl(PLLCON) & PLL_MASK_0, PLLCON);
+ /* pll_off=1, M=17, N=1, OD=1, PLL_OUT_CLK=136M */
+ writel((readl(PLLCON) & PLL_MASK_1) | 0x100111, PLLCON);
+ /* pll_off=0, M=17, N=1, OD=1, PLL_OUT_CLK=136M */
+ writel((readl(PLLCON) & PLL_MASK_2) | 0x100111, PLLCON);
+ break;
+
case 144:
writel(readl(PLLCON) & PLL_MASK_0, PLLCON);
/* pll_off=1, M=18, N=1, OD=1, PLL_OUT_CLK=144M */