diff options
-rw-r--r-- | arch/arm/boot/dts/at91sam9g45.dtsi | 67 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9m10g45ek.dts | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9n12.dtsi | 11 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9x5.dtsi | 85 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9x5ek.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/sama5d3.dtsi | 19 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9g45.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9x5.c | 2 | ||||
-rw-r--r-- | include/dt-bindings/dma/at91.h | 27 |
9 files changed, 199 insertions, 24 deletions
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index a03d0c05d027..c3e514837074 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -10,6 +10,7 @@ */ #include "skeleton.dtsi" +#include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> @@ -617,7 +618,7 @@ compatible = "atmel,hsmci"; reg = <0xfff80000 0x600>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; - dmas = <&dma 1 0>; + dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; @@ -628,7 +629,7 @@ compatible = "atmel,hsmci"; reg = <0xfffd0000 0x600>; interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>; - dmas = <&dma 1 13>; + dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>; dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; @@ -662,6 +663,68 @@ pinctrl-0 = <&pinctrl_spi1>; status = "disabled"; }; + + usb2: gadget@fff78000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91sam9rl-udc"; + reg = <0x00600000 0x80000 + 0xfff78000 0x400>; + interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; + status = "disabled"; + + ep0 { + reg = <0>; + atmel,fifo-size = <64>; + atmel,nb-banks = <1>; + }; + + ep1 { + reg = <1>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep2 { + reg = <2>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep3 { + reg = <3>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + }; + + ep4 { + reg = <4>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + }; + + ep5 { + reg = <5>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep6 { + reg = <6>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + atmel,can-isoc; + }; + }; }; nand0: nand@40000000 { diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts index 91dbf791d2c6..a4b00e5c61c0 100644 --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts @@ -116,6 +116,11 @@ reg = <0>; }; }; + + usb2: gadget@fff78000 { + atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; }; nand0: nand@40000000 { diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index d37761846cd5..973bf5fd9800 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -8,6 +8,7 @@ */ #include "skeleton.dtsi" +#include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> @@ -97,7 +98,7 @@ compatible = "atmel,hsmci"; reg = <0xf0008000 0x600>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; - dmas = <&dma 1 0>; + dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; @@ -465,8 +466,8 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8010000 0x100>; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; - dmas = <&dma 1 13>, - <&dma 1 14>; + dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>, + <&dma 1 AT91_DMA_CFG_PER_ID(14)>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; @@ -477,8 +478,8 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8014000 0x100>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; - dmas = <&dma 1 15>, - <&dma 1 16>; + dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>, + <&dma 1 AT91_DMA_CFG_PER_ID(16)>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index ff4bd7a061b0..57d45f5bea09 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -10,6 +10,7 @@ */ #include "skeleton.dtsi" +#include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> @@ -550,7 +551,7 @@ compatible = "atmel,hsmci"; reg = <0xf0008000 0x600>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; - dmas = <&dma0 1 0>; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; @@ -561,7 +562,7 @@ compatible = "atmel,hsmci"; reg = <0xf000c000 0x600>; interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; - dmas = <&dma1 1 0>; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; @@ -624,8 +625,8 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8010000 0x100>; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; - dmas = <&dma0 1 7>, - <&dma0 1 8>; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>, + <&dma0 1 AT91_DMA_CFG_PER_ID(8)>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; @@ -638,8 +639,8 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8014000 0x100>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; - dmas = <&dma1 1 5>, - <&dma1 1 6>; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>, + <&dma1 1 AT91_DMA_CFG_PER_ID(6)>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; @@ -652,8 +653,8 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8018000 0x100>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; - dmas = <&dma0 1 9>, - <&dma0 1 10>; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>, + <&dma0 1 AT91_DMA_CFG_PER_ID(10)>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; @@ -727,6 +728,9 @@ compatible = "atmel,at91rm9200-spi"; reg = <0xf0000000 0x100>; interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>, + <&dma0 1 AT91_DMA_CFG_PER_ID(2)>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; status = "disabled"; @@ -738,11 +742,76 @@ compatible = "atmel,at91rm9200-spi"; reg = <0xf0004000 0x100>; interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>, + <&dma1 1 AT91_DMA_CFG_PER_ID(2)>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; status = "disabled"; }; + usb2: gadget@f803c000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91sam9rl-udc"; + reg = <0x00500000 0x80000 + 0xf803c000 0x400>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; + status = "disabled"; + + ep0 { + reg = <0>; + atmel,fifo-size = <64>; + atmel,nb-banks = <1>; + }; + + ep1 { + reg = <1>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep2 { + reg = <2>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep3 { + reg = <3>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + }; + + ep4 { + reg = <4>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + }; + + ep5 { + reg = <5>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep6 { + reg = <6>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + atmel,can-isoc; + }; + }; + watchdog@fffffe40 { compatible = "atmel,at91sam9260-wdt"; reg = <0xfffffe40 0x10>; diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi index 5930b0eb68a7..b753855b2058 100644 --- a/arch/arm/boot/dts/at91sam9x5ek.dtsi +++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi @@ -52,6 +52,11 @@ status = "okay"; }; + usb2: gadget@f803c000 { + atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + i2c0: i2c@f8010000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index f57ffbc97432..bbf88d722956 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -9,6 +9,7 @@ */ #include "skeleton.dtsi" +#include <dt-bindings/dma/at91.h> #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> @@ -67,7 +68,7 @@ compatible = "atmel,hsmci"; reg = <0xf0000000 0x600>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; - dmas = <&dma0 2 0>; + dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; @@ -115,8 +116,8 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf0014000 0x4000>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>; - dmas = <&dma0 2 7>, - <&dma0 2 8>; + dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>, + <&dma0 2 AT91_DMA_CFG_PER_ID(8)>; dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; @@ -129,8 +130,8 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf0018000 0x4000>; interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>; - dmas = <&dma0 2 9>, - <&dma0 2 10>; + dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>, + <&dma0 2 AT91_DMA_CFG_PER_ID(10)>; dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; @@ -177,7 +178,7 @@ compatible = "atmel,hsmci"; reg = <0xf8000000 0x600>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>; - dmas = <&dma1 2 0>; + dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; @@ -190,7 +191,7 @@ compatible = "atmel,hsmci"; reg = <0xf8004000 0x600>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; - dmas = <&dma1 2 1>; + dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>; dma-names = "rxtx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; @@ -303,8 +304,8 @@ compatible = "atmel,at91sam9x5-i2c"; reg = <0xf801c000 0x4000>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>; - dmas = <&dma1 2 11>, - <&dma1 2 12>; + dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, + <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 8b7fce067652..95a418a7aabe 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -266,6 +266,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk), CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk), CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk), + CLKDEV_CON_DEV_ID("hclk", "600000.gadget", &utmi_clk), + CLKDEV_CON_DEV_ID("pclk", "600000.gadget", &udphs_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk), diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index e631fec040ce..2abee6626aac 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -249,6 +249,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk), CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk), CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk), + CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk), + CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk), }; /* diff --git a/include/dt-bindings/dma/at91.h b/include/dt-bindings/dma/at91.h new file mode 100644 index 000000000000..e835037a77b4 --- /dev/null +++ b/include/dt-bindings/dma/at91.h @@ -0,0 +1,27 @@ +/* + * This header provides macros for at91 dma bindings. + * + * Copyright (C) 2013 Ludovic Desroches <ludovic.desroches@atmel.com> + * + * GPLv2 only + */ + +#ifndef __DT_BINDINGS_AT91_DMA_H__ +#define __DT_BINDINGS_AT91_DMA_H__ + +/* + * Source and/or destination peripheral ID + */ +#define AT91_DMA_CFG_PER_ID_MASK (0xff) +#define AT91_DMA_CFG_PER_ID(id) (id & AT91_DMA_CFG_PER_ID_MASK) + +/* + * FIFO configuration: it defines when a request is serviced. + */ +#define AT91_DMA_CFG_FIFOCFG_OFFSET (8) +#define AT91_DMA_CFG_FIFOCFG_MASK (0xf << AT91_DMA_CFG_FIFOCFG_OFFSET) +#define AT91_DMA_CFG_FIFOCFG_HALF (0x0 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* half FIFO (default behavior) */ +#define AT91_DMA_CFG_FIFOCFG_ALAP (0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* largest defined AHB burst */ +#define AT91_DMA_CFG_FIFOCFG_ASAP (0x2 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* single AHB access */ + +#endif /* __DT_BINDINGS_AT91_DMA_H__ */ |