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authorMugunthan V N <mugunthanvnm@ti.com>2013-02-11 09:52:20 +0000
committerDavid S. Miller <davem@davemloft.net>2013-02-12 16:15:10 -0500
commitd9ba8f9e6298af71ec1c1fd3d88c3ef68abd0ec3 (patch)
tree933b4cdcb097e37e8eaea6970f791e862040bd0b /include
parent9232b16df2167c8afcb89de39ee85f5091ebacff (diff)
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driver: net: ethernet: cpsw: dual emac interface implementation
The CPSW switch can act as Dual EMAC by segregating the switch ports using VLAN and port VLAN as per the TRM description in 14.3.2.10.2 Dual Mac Mode Following CPSW components will be common for both the interfaces. * Interrupt source is common for both eth interfaces * Interrupt pacing is common for both interfaces * Hardware statistics is common for all the ports * CPDMA is common for both eth interface * CPTS is common for both the interface and it should not be enabled on both the interface as timestamping information doesn't contain port information. Constrains * Reserved VID of One port should not be used in other interface which will enable switching functionality * Same VID must not be used in both the interface which will enable switching functionality Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r--include/linux/platform_data/cpsw.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/platform_data/cpsw.h b/include/linux/platform_data/cpsw.h
index e962cfd552e3..798fb80b024b 100644
--- a/include/linux/platform_data/cpsw.h
+++ b/include/linux/platform_data/cpsw.h
@@ -21,6 +21,8 @@ struct cpsw_slave_data {
char phy_id[MII_BUS_ID_SIZE];
int phy_if;
u8 mac_addr[ETH_ALEN];
+ u16 dual_emac_res_vlan; /* Reserved VLAN for DualEMAC */
+
};
struct cpsw_platform_data {
@@ -36,6 +38,7 @@ struct cpsw_platform_data {
u32 rx_descs; /* Number of Rx Descriptios */
u32 mac_control; /* Mac control register */
u16 default_vlan; /* Def VLAN for ALE lookup in VLAN aware mode*/
+ bool dual_emac; /* Enable Dual EMAC mode */
};
#endif /* __CPSW_H__ */