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author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-24 18:26:16 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-29 14:48:14 +0200 |
commit | e1f5ce819c60a1020b43532333b0db291f2ce5c1 (patch) | |
tree | 8980e440bf4b72f328e14cabfb97e84d4a54fb5a /arch/unicore32 | |
parent | fa680c7c22ea8382847815c5fb91a30202a578a0 (diff) | |
download | linux-stable-e1f5ce819c60a1020b43532333b0db291f2ce5c1.tar.gz linux-stable-e1f5ce819c60a1020b43532333b0db291f2ce5c1.tar.bz2 linux-stable-e1f5ce819c60a1020b43532333b0db291f2ce5c1.zip |
unicore32: Convert to new irq function names
Scripted with coccinelle.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/unicore32')
-rw-r--r-- | arch/unicore32/kernel/irq.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/unicore32/kernel/irq.c b/arch/unicore32/kernel/irq.c index b23624cf3062..a6ee47f162ee 100644 --- a/arch/unicore32/kernel/irq.c +++ b/arch/unicore32/kernel/irq.c @@ -321,24 +321,24 @@ void __init init_IRQ(void) writel(1, INTC_ICCR); for (irq = 0; irq < IRQ_GPIOHIGH; irq++) { - set_irq_chip(irq, &puv3_low_gpio_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &puv3_low_gpio_chip); + irq_set_handler(irq, handle_edge_irq); irq_modify_status(irq, IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN, 0); } for (irq = IRQ_GPIOHIGH + 1; irq < IRQ_GPIO0; irq++) { - set_irq_chip(irq, &puv3_normal_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &puv3_normal_chip); + irq_set_handler(irq, handle_level_irq); irq_modify_status(irq, IRQ_NOREQUEST | IRQ_NOAUTOEN, IRQ_NOPROBE); } for (irq = IRQ_GPIO0; irq <= IRQ_GPIO27; irq++) { - set_irq_chip(irq, &puv3_high_gpio_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &puv3_high_gpio_chip); + irq_set_handler(irq, handle_edge_irq); irq_modify_status(irq, IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN, 0); @@ -347,8 +347,8 @@ void __init init_IRQ(void) /* * Install handler for GPIO 0-27 edge detect interrupts */ - set_irq_chip(IRQ_GPIOHIGH, &puv3_normal_chip); - set_irq_chained_handler(IRQ_GPIOHIGH, puv3_gpio_handler); + irq_set_chip(IRQ_GPIOHIGH, &puv3_normal_chip); + irq_set_chained_handler(IRQ_GPIOHIGH, puv3_gpio_handler); #ifdef CONFIG_PUV3_GPIO puv3_init_gpio(); |