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author | Thomas Gleixner <tglx@linutronix.de> | 2007-10-15 23:28:20 +0200 |
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committer | Thomas Gleixner <tglx@inhelltoy.tec.linutronix.de> | 2007-10-17 20:17:14 +0200 |
commit | b2bba72c10cdd907f73c57c8bdeb3354f8c233c6 (patch) | |
tree | eef512cf0dc014f3e7b078d5c9c47ec16f63c831 | |
parent | 0b4dc7c3524c59fae4c369ee5de274275b95d053 (diff) | |
download | linux-stable-b2bba72c10cdd907f73c57c8bdeb3354f8c233c6.tar.gz linux-stable-b2bba72c10cdd907f73c57c8bdeb3354f8c233c6.tar.bz2 linux-stable-b2bba72c10cdd907f73c57c8bdeb3354f8c233c6.zip |
x86: unify include/asm/cacheflush_32/64.h
Same file, except for whitespace, comment formatting and the extra
DEBUG_PAGE_ALLOC function in _32.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | include/asm-x86/cacheflush.h | 43 | ||||
-rw-r--r-- | include/asm-x86/cacheflush_32.h | 39 | ||||
-rw-r--r-- | include/asm-x86/cacheflush_64.h | 35 |
3 files changed, 39 insertions, 78 deletions
diff --git a/include/asm-x86/cacheflush.h b/include/asm-x86/cacheflush.h index e2df3b55034a..b3d43de44c59 100644 --- a/include/asm-x86/cacheflush.h +++ b/include/asm-x86/cacheflush.h @@ -1,5 +1,40 @@ -#ifdef CONFIG_X86_32 -# include "cacheflush_32.h" -#else -# include "cacheflush_64.h" +#ifndef _ASM_X86_CACHEFLUSH_H +#define _ASM_X86_CACHEFLUSH_H + +/* Keep includes the same across arches. */ +#include <linux/mm.h> + +/* Caches aren't brain-dead on the intel. */ +#define flush_cache_all() do { } while (0) +#define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) +#define flush_cache_range(vma, start, end) do { } while (0) +#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) +#define flush_dcache_page(page) do { } while (0) +#define flush_dcache_mmap_lock(mapping) do { } while (0) +#define flush_dcache_mmap_unlock(mapping) do { } while (0) +#define flush_icache_range(start, end) do { } while (0) +#define flush_icache_page(vma,pg) do { } while (0) +#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) +#define flush_cache_vmap(start, end) do { } while (0) +#define flush_cache_vunmap(start, end) do { } while (0) + +#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ + memcpy(dst, src, len) +#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ + memcpy(dst, src, len) + +void global_flush_tlb(void); +int change_page_attr(struct page *page, int numpages, pgprot_t prot); +int change_page_attr_addr(unsigned long addr, int numpages, pgprot_t prot); + +#ifdef CONFIG_DEBUG_PAGEALLOC +/* internal debugging function */ +void kernel_map_pages(struct page *page, int numpages, int enable); +#endif + +#ifdef CONFIG_DEBUG_RODATA +void mark_rodata_ro(void); +#endif + #endif diff --git a/include/asm-x86/cacheflush_32.h b/include/asm-x86/cacheflush_32.h deleted file mode 100644 index 74e03c8f2e51..000000000000 --- a/include/asm-x86/cacheflush_32.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef _I386_CACHEFLUSH_H -#define _I386_CACHEFLUSH_H - -/* Keep includes the same across arches. */ -#include <linux/mm.h> - -/* Caches aren't brain-dead on the intel. */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) - -void global_flush_tlb(void); -int change_page_attr(struct page *page, int numpages, pgprot_t prot); - -#ifdef CONFIG_DEBUG_PAGEALLOC -/* internal debugging function */ -void kernel_map_pages(struct page *page, int numpages, int enable); -#endif - -#ifdef CONFIG_DEBUG_RODATA -void mark_rodata_ro(void); -#endif - -#endif /* _I386_CACHEFLUSH_H */ diff --git a/include/asm-x86/cacheflush_64.h b/include/asm-x86/cacheflush_64.h deleted file mode 100644 index ab1cb5c7dc92..000000000000 --- a/include/asm-x86/cacheflush_64.h +++ /dev/null @@ -1,35 +0,0 @@ -#ifndef _X8664_CACHEFLUSH_H -#define _X8664_CACHEFLUSH_H - -/* Keep includes the same across arches. */ -#include <linux/mm.h> - -/* Caches aren't brain-dead on the intel. */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) - -void global_flush_tlb(void); -int change_page_attr(struct page *page, int numpages, pgprot_t prot); -int change_page_attr_addr(unsigned long addr, int numpages, pgprot_t prot); - -#ifdef CONFIG_DEBUG_RODATA -void mark_rodata_ro(void); -#endif - -#endif /* _X8664_CACHEFLUSH_H */ |