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author | Théo Lebrun <theo.lebrun@bootlin.com> | 2024-02-28 12:28:03 +0100 |
---|---|---|
committer | Sasha Levin <sashal@kernel.org> | 2024-03-26 18:19:54 -0400 |
commit | 37e0f758e0573fefab300cfd602a4a0a1709678c (patch) | |
tree | 4633a443738eae9c9e435ce73d0ccb0bd1bd5027 /drivers/pinctrl | |
parent | 310ae9eb3d2a13345f2590e7581fd45d97323a02 (diff) | |
download | linux-rpi-37e0f758e0573fefab300cfd602a4a0a1709678c.tar.gz linux-rpi-37e0f758e0573fefab300cfd602a4a0a1709678c.tar.bz2 linux-rpi-37e0f758e0573fefab300cfd602a4a0a1709678c.zip |
gpio: nomadik: fix offset bug in nmk_pmx_set()
[ Upstream commit 53cf6b72e074864b94ade97dcb6f30b5ac1a82dc ]
Previously, the statement looked like:
slpm[x] &= ~BIT(g->grp.pins[i]);
Where:
- slpm is a unsigned int pointer;
- g->grp.pins[i] is a pin number. It can grow to more than 32.
The expected shift amount is a pin bank offset.
This bug does not occur on every group or pin: the altsetting must be
NMK_GPIO_ALT_C and the pin must be 32 or above. It might have occured.
For example, in pinctrl-nomadik-db8500.c, pin group i2c3_c_2 has the
right altsetting and pins 229 and 230.
Fixes: dbfe8ca259e1 ("pinctrl/nomadik: implement pin multiplexing")
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-5-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/nomadik/pinctrl-nomadik.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 86a638077a69..e7d33093994b 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1573,8 +1573,10 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, * Then mask the pins that need to be sleeping now when we're * switching to the ALT C function. */ - for (i = 0; i < g->grp.npins; i++) - slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(g->grp.pins[i]); + for (i = 0; i < g->grp.npins; i++) { + unsigned int bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; + slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(bit); + } nmk_gpio_glitch_slpm_init(slpm); } |