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authorRoger Quadros <rogerq@ti.com>2014-09-02 16:57:03 +0300
committerTony Lindgren <tony@atomide.com>2014-09-04 12:39:01 -0700
commit6b8691100538427ad739fc8735451a30c73316ff (patch)
tree0214e692b520bdbae86332a4db6e3e1fbf409914 /arch
parentdb01e6c7fbe3b87b389f537b52a5d862cea498e1 (diff)
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ARM: dts: am437x-gp-evm: Use BCH16 ECC scheme instead of BCH8
am437x-gp-evm uses a NAND chip with page size 4096 bytes and spare area of 225 bytes per page. For such a setup it is preferrable to use BCH16 ECC scheme over BCH8. This also makes it compatible with ROM code ECC scheme so we can boot with NAND after flashing from kernel. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Pekon Gupta <pekon@pek-sem.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 9559c1962ac8..bd64159e6b32 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -424,7 +424,7 @@
ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
nand@0,0 {
reg = <0 0 4>; /* device IO registers */
- ti,nand-ecc-opt = "bch8";
+ ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;