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authorLinus Torvalds <torvalds@linux-foundation.org>2017-02-09 11:30:56 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2017-02-09 11:30:56 -0800
commit59e8f10ac16186c226ef81937994534b28b976f4 (patch)
tree66149a98d76008ac3e36a4cae624651f20659e07 /arch
parentd966564fcdc19e13eb6ba1fbe6b8101070339c3d (diff)
parent228dbbfb5d77f8e047b2a1d78da14b7158433027 (diff)
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Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: "A couple more fixes for 4.10: - fix addressing the short regset write issue (Dave Martin) - fix for LPAE systems which leave a pending imprecise data abort before entering the kernel (Alexander Sverdlin)" * 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8643/3: arm/ptrace: Preserve previous registers for short regset write ARM: 8642/1: LPAE: catch pending imprecise abort on unmask
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/kernel/ptrace.c2
-rw-r--r--arch/arm/mm/fault.c4
-rw-r--r--arch/arm/mm/fault.h4
3 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index ce131ed5939d..ae738a6319f6 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -600,7 +600,7 @@ static int gpr_set(struct task_struct *target,
const void *kbuf, const void __user *ubuf)
{
int ret;
- struct pt_regs newregs;
+ struct pt_regs newregs = *task_pt_regs(target);
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&newregs,
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 3a2e678b8d30..0122ad1a6027 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -610,9 +610,9 @@ static int __init early_abort_handler(unsigned long addr, unsigned int fsr,
void __init early_abt_enable(void)
{
- fsr_info[22].fn = early_abort_handler;
+ fsr_info[FSR_FS_AEA].fn = early_abort_handler;
local_abt_enable();
- fsr_info[22].fn = do_bad;
+ fsr_info[FSR_FS_AEA].fn = do_bad;
}
#ifndef CONFIG_ARM_LPAE
diff --git a/arch/arm/mm/fault.h b/arch/arm/mm/fault.h
index 67532f242271..afc1f84e763b 100644
--- a/arch/arm/mm/fault.h
+++ b/arch/arm/mm/fault.h
@@ -11,11 +11,15 @@
#define FSR_FS5_0 (0x3f)
#ifdef CONFIG_ARM_LPAE
+#define FSR_FS_AEA 17
+
static inline int fsr_fs(unsigned int fsr)
{
return fsr & FSR_FS5_0;
}
#else
+#define FSR_FS_AEA 22
+
static inline int fsr_fs(unsigned int fsr)
{
return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;