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author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2017-10-09 11:43:44 -0700 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2017-10-14 23:32:51 +0800 |
commit | 1c86c9dd82f859b474474a7fee0d5195da2c9c1d (patch) | |
tree | a6271c5784e0d21e5274fb40e3688b7f74f94e07 /arch | |
parent | 2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e (diff) | |
download | linux-rpi-1c86c9dd82f859b474474a7fee0d5195da2c9c1d.tar.gz linux-rpi-1c86c9dd82f859b474474a7fee0d5195da2c9c1d.tar.bz2 linux-rpi-1c86c9dd82f859b474474a7fee0d5195da2c9c1d.zip |
ARM: dts: imx7d: Invert legacy PCI irq mapping
According to i.MX7D reference manual (Rev. 0.1, table 7-1, page 1221)
legacy PCI interrupt mapping is as follows:
- PCIE INT A is IRQ 122
- PCIE INT B is IRQ 123
- PCIE INT C is IRQ 124
- PCIE INT D is IRQ 125
Invert the mapping information in corresponding DT node to reflect
that.
Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Fixes: a816d5750edf ("ARM: dts: imx7d: Add node for PCIe controller")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/imx7d.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index f46814a7ea44..4d308d17f040 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -144,10 +144,10 @@ interrupt-names = "msi"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 1 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, <&clks IMX7D_PCIE_PHY_ROOT_CLK>; |