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authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>2020-03-11 16:41:15 +0300
committerStephen Boyd <sboyd@kernel.org>2020-05-28 21:06:39 -0700
commit56fbeefe366e5920802f60f26b6b59b365c0569b (patch)
tree6c89a056b78a8189ce5d9518978d096a691c1853 /include/dt-bindings/reset
parent423f042a65a2af82337af4e3c7f2cd828185e4f3 (diff)
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CLK: HSDK: CGU: add support for 148.5MHz clock
Add support for 148.5MHz clock for HDMI PLL Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lkml.kernel.org/r/20200311134115.13257-4-Eugeniy.Paltsev@synopsys.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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