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author | Takashi Iwai <tiwai@suse.de> | 2013-05-08 08:09:34 +0200 |
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committer | Takashi Iwai <tiwai@suse.de> | 2013-05-08 08:24:57 +0200 |
commit | 17df3f55652f7ea8fb1197b5c32e227b3da9f215 (patch) | |
tree | aab1cb7a8737524cfccf8d581176ef841b367f89 /include | |
parent | 2195b063f6609e4c6268f291683902f25eaf9aa6 (diff) | |
download | linux-exynos-17df3f55652f7ea8fb1197b5c32e227b3da9f215.tar.gz linux-exynos-17df3f55652f7ea8fb1197b5c32e227b3da9f215.tar.bz2 linux-exynos-17df3f55652f7ea8fb1197b5c32e227b3da9f215.zip |
ALSA: hda - Apply pin-enablement workaround to all Haswell HDMI codecs
This is a revised patch based on Mengdong Lin's fix patch, which is a
supplement to a previous patch [1611a9c9: ALSA: hda - Add fixup for
Haswell to enable all pin and convertor widgets].
Some Haswell BIOS will disable the 2nd and 3rd pin/covertor widgets
when the HD-A controller changes state from D3 to D0. So when the
controller resumes after a system or runtime suspend, these widgets
are disabled and programming these widgets to D0 will cause H/W error
and codec will not respond.
In addition, we found out that some BIOS disables the pins at S3
although it shows up at boot. This confuses the driver utterly, and
the hardware falls into the fatal communication error like the above.
So in this patch, we apply intel_haswell_enable_all_pins() not only as
a fixup to a certain device (with 8086:2010) but to all Haswell
machines. The codec driver basically assumes that all pins are
exposed, so it's anyway better to see them from the beginning. Even
if all pins and converters are shown by this call, there should be no
regression in practice: the pin default configurations are still kept,
thus the disabled pins are handled as disabled by the driver
properly.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'include')
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