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author | John Crispin <blogic@openwrt.org> | 2013-01-20 22:01:29 +0100 |
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committer | John Crispin <blogic@openwrt.org> | 2013-02-17 01:25:30 +0100 |
commit | 3f0a06b0368d25608841843e9d65a7289ad9f14a (patch) | |
tree | d2e005f4a7db2a905910552af77f8635d33a3579 /arch/mips/ralink | |
parent | 7e47cefa69c8ed2c889522ce29fcce73ce8cf08e (diff) | |
download | linux-exynos-3f0a06b0368d25608841843e9d65a7289ad9f14a.tar.gz linux-exynos-3f0a06b0368d25608841843e9d65a7289ad9f14a.tar.bz2 linux-exynos-3f0a06b0368d25608841843e9d65a7289ad9f14a.zip |
MIPS: ralink: adds clkdev code
These SoCs have a limited number of fixed rate clocks. Add support for the
clk and clkdev api.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4894/
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r-- | arch/mips/ralink/clk.c | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c new file mode 100644 index 000000000000..8dfa22ff300b --- /dev/null +++ b/arch/mips/ralink/clk.c @@ -0,0 +1,72 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> + * Copyright (C) 2013 John Crispin <blogic@openwrt.org> + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/clkdev.h> +#include <linux/clk.h> + +#include <asm/time.h> + +#include "common.h" + +struct clk { + struct clk_lookup cl; + unsigned long rate; +}; + +void ralink_clk_add(const char *dev, unsigned long rate) +{ + struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL); + + if (!clk) + panic("failed to add clock\n"); + + clk->cl.dev_id = dev; + clk->cl.clk = clk; + + clk->rate = rate; + + clkdev_add(&clk->cl); +} + +/* + * Linux clock API + */ +int clk_enable(struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL_GPL(clk_enable); + +void clk_disable(struct clk *clk) +{ +} +EXPORT_SYMBOL_GPL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + return clk->rate; +} +EXPORT_SYMBOL_GPL(clk_get_rate); + +void __init plat_time_init(void) +{ + struct clk *clk; + + ralink_of_remap(); + + ralink_clk_init(); + clk = clk_get_sys("cpu", NULL); + if (IS_ERR(clk)) + panic("unable to get CPU clock, err=%ld", PTR_ERR(clk)); + pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000); + mips_hpt_frequency = clk_get_rate(clk) / 2; + clk_put(clk); +} |